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vhdl
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vhdl-nodes_meta.adb
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Author
Age
Files
Lines
*
vhdl: also warns on unused enumeration literal
Tristan Gingold
2021-11-01
1
-209
/
+211
*
Add parsing of case? statement and simple test.
Brian Padalino
2021-09-24
1
-73
/
+88
*
trans-chap9.adb: handle async_abort, sync_abort. Fix #1654
Tristan Gingold
2021-08-30
1
-110
/
+106
*
vhdl and psl: parse sync_abort and async_abort. For #1654
Tristan Gingold
2021-08-30
1
-107
/
+133
*
vhdl: remove iir_kind_anonymous_signal_declaration (now unused)
Tristan Gingold
2021-08-24
1
-203
/
+181
*
vhdl: introduce iir_kind_association_element_by_name
Tristan Gingold
2021-08-06
1
-299
/
+329
*
vhdl-nodes: remove Identifier from Psl_Default_Clock
Tristan Gingold
2021-06-30
1
-101
/
+98
*
vhdl: remove unused Get/Set_Alias_Declaration
Tristan Gingold
2021-05-16
1
-94
/
+68
*
vhdl: add Iir_Kind_Foreign_Module
Tristan Gingold
2021-04-05
1
-317
/
+366
*
vhdl-nodes.ads: reorder fields of block_configuration to match grammar
Tristan Gingold
2021-02-20
1
-1
/
+1
*
Add support for PSL onehot/onehot0 functions (#1633)
T. Meissner
2021-02-09
1
-116
/
+136
*
update license headers
umarcor
2021-01-14
1
-11
/
+9
*
vhdl: fix reprint of vhdl08 array element constraints.
Tristan Gingold
2021-01-05
1
-255
/
+285
*
vhdl: handle locally static attributes on entity/architecture/configurations
Tristan Gingold
2020-12-08
1
-266
/
+283
*
vhdl: analyze subprogram instantiations. WIP. For #1470
Tristan Gingold
2020-09-26
1
-203
/
+215
*
vhdl: parse subprogram instantiations. For #1470
Tristan Gingold
2020-09-24
1
-201
/
+259
*
vhdl: parse and analyze force/release signal assignment statements.
Tristan Gingold
2020-08-01
1
-85
/
+189
*
vhdl: adjust hanlding of guard signals for translate.
Tristan Gingold
2020-07-25
1
-191
/
+193
*
vhdl: replace base_type with parent_type in nodes
Tristan Gingold
2020-07-22
1
-355
/
+329
*
vhdl: fix ownership for recors subtypes.
Tristan Gingold
2020-07-18
1
-269
/
+273
*
vhdl-nodes: make Subtype_Indication Maybe_Ref. For #641
Tristan Gingold
2020-06-30
1
-221
/
+241
*
vhdl-nodes: add Open_Flag to all generic interfaces.
Tristan Gingold
2020-06-26
1
-189
/
+204
*
vhdl: create default configuration for a vunit. Fix #1372
Tristan Gingold
2020-06-15
1
-226
/
+251
*
Synthesis of PSL prev function.
Tristan Gingold
2020-06-02
1
-132
/
+140
*
vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662
Tristan Gingold
2020-06-02
1
-115
/
+214
*
vhdl-nodes: use a flag field for direction.
Tristan Gingold
2020-05-20
1
-1
/
+1
*
vhdl: allow attribute specifications in protected types. For #1252
Tristan Gingold
2020-04-20
1
-252
/
+256
*
types: introduce Direction_Type, which replaces Iir_Direction.
Tristan Gingold
2020-04-20
1
-25
/
+25
*
vhdl: add scalar_size. Size of scalar types is computed during analysis.
Tristan Gingold
2020-04-06
1
-240
/
+286
*
synthesis: add option --vendor-library= for synthesis.
Tristan Gingold
2020-03-10
1
-210
/
+225
*
ams-vhdl: add support for 'delayed for quantity.
Tristan Gingold
2019-12-31
1
-25
/
+45
*
ams-vhdl: handle zoh, ltf and ztf attributes.
Tristan Gingold
2019-12-31
1
-29
/
+119
*
ams-vhdl: add simultaneous null statement.
Tristan Gingold
2019-12-30
1
-87
/
+123
*
ams-vhdl: improve error recovery
Tristan Gingold
2019-12-30
1
-1
/
+2
*
ams-vhdl: analyze, canon and print simultaneous procedural statements.
Tristan Gingold
2019-12-30
1
-86
/
+92
*
ams-vhdl: fix tree consistency for terminal declaration.
Tristan Gingold
2019-12-30
1
-1
/
+1
*
ams-vhdl: check nature for record natures and terminals.
Tristan Gingold
2019-12-30
1
-225
/
+247
*
vhdl-ams: fix tree consistency for subnature declaration.
Tristan Gingold
2019-12-29
1
-1
/
+1
*
vhdl: improve support of AMS-vhdl (array and record natures, source quantities)
Tristan Gingold
2019-12-28
1
-379
/
+1315
*
vhdl: add Has_Delay_Machanism for optional 'inertial' printing.
Tristan Gingold
2019-12-26
1
-91
/
+121
*
vhdl: allow attributes in vunit declarations.
Tristan Gingold
2019-10-30
1
-197
/
+203
*
vhdl: add exit/next flags.
Tristan Gingold
2019-09-18
1
-63
/
+107
*
vhdl: renames Conditional_Expression to Conditional_Expression_Chain.
Tristan Gingold
2019-09-02
1
-11
/
+11
*
synth: handle verification units.
Tristan Gingold
2019-08-20
1
-202
/
+226
*
vhdl: parse verification unit (WIP).
Tristan Gingold
2019-08-17
1
-243
/
+256
*
vhdl: declare verification units (WIP).
Tristan Gingold
2019-08-16
1
-263
/
+392
*
vhdl: improve reprint of inertial association.
Tristan Gingold
2019-08-11
1
-152
/
+156
*
vhdl: remove unused Get/Set_Choice_Order.
Tristan Gingold
2019-08-09
1
-275
/
+247
*
vhdl: remove severity from cover, report and severity from assume.
Tristan Gingold
2019-08-08
1
-84
/
+86
*
vhdl-nodes: gather PSL nodes, regenerate nodes_meta.
Tristan Gingold
2019-08-07
1
-95
/
+87
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