iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	vhdl: add exit/next flags.	Tristan Gingold	2019-09-18	1	-63/+107
*	vhdl: renames Conditional_Expression to Conditional_Expression_Chain.	Tristan Gingold	2019-09-02	1	-11/+11
*	synth: handle verification units.	Tristan Gingold	2019-08-20	1	-202/+226
*	vhdl: parse verification unit (WIP).	Tristan Gingold	2019-08-17	1	-243/+256
*	vhdl: declare verification units (WIP).	Tristan Gingold	2019-08-16	1	-263/+392
*	vhdl: improve reprint of inertial association.	Tristan Gingold	2019-08-11	1	-152/+156
*	vhdl: remove unused Get/Set_Choice_Order.	Tristan Gingold	2019-08-09	1	-275/+247
*	vhdl: remove severity from cover, report and severity from assume.	Tristan Gingold	2019-08-08	1	-84/+86
*	vhdl-nodes: gather PSL nodes, regenerate nodes_meta.	Tristan Gingold	2019-08-07	1	-95/+87
*	Add support for PSL assumptions, used in formal verification (#880)	Pepijn de Vos	2019-08-07	1	-101/+137
*	vhdl: linearize analyze and evaluation of concat operators.	Tristan Gingold	2019-07-26	1	-1/+13
*	vhdl: rename Cover_Statement to Cover_Directive.	Tristan Gingold	2019-07-04	1	-18/+18
*	vhdl: parse and analyze restrict directive.	Tristan Gingold	2019-07-04	1	-89/+121
*	vhdl: add anonymous_signal_declaration.	Tristan Gingold	2019-07-03	1	-151/+173
*	vhdl-disp_vhdl: print literals and identifiers from the source.	Tristan Gingold	2019-05-29	1	-264/+292
*	vhdl: get rid of Get/Set_Physical_Unit.	Tristan Gingold	2019-05-28	1	-280/+258
*	vhdl: update AMS parsing.	Tristan Gingold	2019-05-24	1	-172/+176
*	vhdl-parse: Add Has_Is for block_statement.	Tristan Gingold	2019-05-24	1	-1/+3
*	vhdl-nodes: make subtype_Definition like the others.	Tristan Gingold	2019-05-23	1	-201/+205
*	vhdl-nodes: fix minor typo.	Tristan Gingold	2019-05-11	1	-54/+50
*	vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64.	Tristan Gingold	2019-05-10	1	-50/+50
*	vhdl: move nodes_meta package to vhdl child.	Tristan Gingold	2019-05-06	1	-0/+10786