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* vhdl-nodes: add Inertial_Flag for association_element_by_expressionTristan Gingold2022-06-121-302/+317
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* vhdl-canon: add Canon_Add_Suspend_StateTristan Gingold2022-05-261-187/+224
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* vhdl-nodes: remove unused fields for procedure declarationsTristan Gingold2022-05-171-219/+210
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* vhdl: add suspend state pseudo decl and stmt. WIP.Tristan Gingold2022-05-171-178/+194
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* synth: add support for subtype declaration in vunits. Fix #2033Tristan Gingold2022-04-131-231/+237
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* vhdl: parse return identifier (v19)Tristan Gingold2022-03-041-208/+230
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* vhdl: Iir_Kind_Foreign_Module is now a library unitTristan Gingold2021-11-091-353/+338
| | | | | (instead of a design unit). Also, add Iir_Kind_Foreign_Vector_Type_Definition
* vhdl: parse PSL inherit spec. For #1899Tristan Gingold2021-11-041-335/+336
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* vhdl: also warns on unused enumeration literalTristan Gingold2021-11-011-209/+211
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* Add parsing of case? statement and simple test.Brian Padalino2021-09-241-73/+88
| | | | Also add the Matching flag to the Iir_Kind_Case_Statement.
* trans-chap9.adb: handle async_abort, sync_abort. Fix #1654Tristan Gingold2021-08-301-110/+106
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* vhdl and psl: parse sync_abort and async_abort. For #1654Tristan Gingold2021-08-301-107/+133
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* vhdl: remove iir_kind_anonymous_signal_declaration (now unused)Tristan Gingold2021-08-241-203/+181
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* vhdl: introduce iir_kind_association_element_by_nameTristan Gingold2021-08-061-299/+329
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* vhdl-nodes: remove Identifier from Psl_Default_ClockTristan Gingold2021-06-301-101/+98
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* vhdl: remove unused Get/Set_Alias_DeclarationTristan Gingold2021-05-161-94/+68
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* vhdl: add Iir_Kind_Foreign_ModuleTristan Gingold2021-04-051-317/+366
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* vhdl-nodes.ads: reorder fields of block_configuration to match grammarTristan Gingold2021-02-201-1/+1
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* Add support for PSL onehot/onehot0 functions (#1633)T. Meissner2021-02-091-116/+136
| | | | | | | | | | | | | | | * vhdl: parse PSL onehot/onehot0 builtin calls. For #662 * update pyGHDL bindings * Synthesis of PSL built-in onehot/onehot0 function. * testsuite/synth: add tests of PSL built-in functions onehot()/onehot0() for #662 * doc: add info about PSL built-in functions onehot()/onehot0() for #662 * synth: refactor synthesis of onehot/onehot0 functions Co-authored-by: eine <eine@users.noreply.github.com>
* update license headersumarcor2021-01-141-11/+9
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* vhdl: fix reprint of vhdl08 array element constraints.Tristan Gingold2021-01-051-255/+285
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* vhdl: handle locally static attributes on entity/architecture/configurationsTristan Gingold2020-12-081-266/+283
| | | | | | | | | | | | | Attributes of entity/architecture/configurations are expected to be locally static so that they can be referenced from outside (so on the non-instantiated entity). But many designs break this assumption. In relaxed mode, non-locally static attributes are allowed but now cannot be referenced outside the entity. Locally static attributes can be referenced from outside. Fix #1528
* vhdl: analyze subprogram instantiations. WIP. For #1470Tristan Gingold2020-09-261-203/+215
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* vhdl: parse subprogram instantiations. For #1470Tristan Gingold2020-09-241-201/+259
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* vhdl: parse and analyze force/release signal assignment statements.Tristan Gingold2020-08-011-85/+189
| | | | For #1416
* vhdl: adjust hanlding of guard signals for translate.Tristan Gingold2020-07-251-191/+193
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* vhdl: replace base_type with parent_type in nodesTristan Gingold2020-07-221-355/+329
| | | | | Only for subtype definition and remove base_type in type definitions. Allows to better track the addition of contraints.
* vhdl: fix ownership for recors subtypes.Tristan Gingold2020-07-181-269/+273
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* vhdl-nodes: make Subtype_Indication Maybe_Ref. For #641Tristan Gingold2020-06-301-221/+241
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* vhdl-nodes: add Open_Flag to all generic interfaces.Tristan Gingold2020-06-261-189/+204
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* vhdl: create default configuration for a vunit. Fix #1372Tristan Gingold2020-06-151-226/+251
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* Synthesis of PSL prev function.Tristan Gingold2020-06-021-132/+140
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* vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662Tristan Gingold2020-06-021-115/+214
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* vhdl-nodes: use a flag field for direction.Tristan Gingold2020-05-201-1/+1
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* vhdl: allow attribute specifications in protected types. For #1252Tristan Gingold2020-04-201-252/+256
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* types: introduce Direction_Type, which replaces Iir_Direction.Tristan Gingold2020-04-201-25/+25
| | | | Global renaming.
* vhdl: add scalar_size. Size of scalar types is computed during analysis.Tristan Gingold2020-04-061-240/+286
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* synthesis: add option --vendor-library= for synthesis.Tristan Gingold2020-03-101-210/+225
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* ams-vhdl: add support for 'delayed for quantity.Tristan Gingold2019-12-311-25/+45
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* ams-vhdl: handle zoh, ltf and ztf attributes.Tristan Gingold2019-12-311-29/+119
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* ams-vhdl: add simultaneous null statement.Tristan Gingold2019-12-301-87/+123
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* ams-vhdl: improve error recoveryTristan Gingold2019-12-301-1/+2
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* ams-vhdl: analyze, canon and print simultaneous procedural statements.Tristan Gingold2019-12-301-86/+92
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* ams-vhdl: fix tree consistency for terminal declaration.Tristan Gingold2019-12-301-1/+1
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* ams-vhdl: check nature for record natures and terminals.Tristan Gingold2019-12-301-225/+247
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* vhdl-ams: fix tree consistency for subnature declaration.Tristan Gingold2019-12-291-1/+1
| | | | Also fix use and canon for it.
* vhdl: improve support of AMS-vhdl (array and record natures, source quantities)Tristan Gingold2019-12-281-379/+1315
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* vhdl: add Has_Delay_Machanism for optional 'inertial' printing.Tristan Gingold2019-12-261-91/+121
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* vhdl: allow attributes in vunit declarations.Tristan Gingold2019-10-301-197/+203
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* vhdl: add exit/next flags.Tristan Gingold2019-09-181-63/+107
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