| Commit message (Expand) | Author | Age | Files | Lines |
* | vhdl: add iir_kind_psl_boolean_parameter node. For #2178 | Tristan Gingold | 2022-08-15 | 1 | -2/+3 |
* | vhdl: add support for file subtype. Fix #2174 | Tristan Gingold | 2022-08-11 | 1 | -0/+1 |
* | vhdl: add Determined_Aggregate_Flag field. For #2166 | Tristan Gingold | 2022-08-10 | 1 | -0/+16 |
* | vhdl: add an owner to interface type definition | Tristan Gingold | 2022-08-07 | 1 | -0/+16 |
* | vhdl: add support for default in interface subprogram. Fix #2163 | Tristan Gingold | 2022-08-07 | 1 | -0/+32 |
* | vhdl-nodes: add Get/Set_Stop_Flag. For #2150 | Tristan Gingold | 2022-07-29 | 1 | -0/+16 |
* | vhdl-nodes: add Get/Set_Reference_Terminal_Flag | Tristan Gingold | 2022-07-25 | 1 | -0/+16 |
* | vhdl-nodes: renaming. | Tristan Gingold | 2022-07-21 | 1 | -17/+17 |
* | vhdl: add Iir_Kinds_AMS_Signal_Attribute | Tristan Gingold | 2022-07-16 | 1 | -1/+1 |
* | vhdl-nodes: add Inertial_Flag for association_element_by_expression | Tristan Gingold | 2022-06-12 | 1 | -0/+16 |
* | vhdl-canon: add Canon_Add_Suspend_State | Tristan Gingold | 2022-05-26 | 1 | -1/+33 |
* | vhdl: add suspend state pseudo decl and stmt. WIP. | Tristan Gingold | 2022-05-17 | 1 | -0/+2 |
* | vhdl: parse return identifier (v19) | Tristan Gingold | 2022-03-04 | 1 | -0/+16 |
* | vhdl: Iir_Kind_Foreign_Module is now a library unit | Tristan Gingold | 2021-11-09 | 1 | -5/+6 |
* | vhdl: parse PSL inherit spec. For #1899 | Tristan Gingold | 2021-11-04 | 1 | -16/+17 |
* | Add parsing of case? statement and simple test. | Brian Padalino | 2021-09-24 | 1 | -0/+16 |
* | vhdl and psl: parse sync_abort and async_abort. For #1654 | Tristan Gingold | 2021-08-30 | 1 | -0/+16 |
* | vhdl: remove iir_kind_anonymous_signal_declaration (now unused) | Tristan Gingold | 2021-08-24 | 1 | -1/+0 |
* | vhdl: introduce iir_kind_association_element_by_name | Tristan Gingold | 2021-08-06 | 1 | -0/+1 |
* | vhdl-nodes: do not reset free hooks on initialization | Tristan Gingold | 2021-06-26 | 1 | -1/+0 |
* | vhdl-nodes: Initialize global state to allow restart. | Tristan Gingold | 2021-06-19 | 1 | -0/+2 |
* | vhdl: remove unused Get/Set_Alias_Declaration | Tristan Gingold | 2021-05-16 | 1 | -16/+0 |
* | vhdl: add Iir_Kind_Foreign_Module | Tristan Gingold | 2021-04-05 | 1 | -0/+17 |
* | Add support for PSL onehot/onehot0 functions (#1633) | T. Meissner | 2021-02-09 | 1 | -0/+2 |
* | update license headers | umarcor | 2021-01-14 | 1 | -11/+9 |
* | vhdl: fix reprint of vhdl08 array element constraints. | Tristan Gingold | 2021-01-05 | 1 | -0/+32 |
* | Rework initialization and finalization. | Tristan Gingold | 2020-12-30 | 1 | -1/+5 |
* | vhdl: handle locally static attributes on entity/architecture/configurations | Tristan Gingold | 2020-12-08 | 1 | -0/+16 |
* | vhdl: analyze subprogram instantiations. WIP. For #1470 | Tristan Gingold | 2020-09-26 | 1 | -2/+2 |
* | vhdl: parse subprogram instantiations. For #1470 | Tristan Gingold | 2020-09-24 | 1 | -0/+18 |
* | vhdl: parse and analyze force/release signal assignment statements. | Tristan Gingold | 2020-08-01 | 1 | -0/+39 |
* | vhdl: replace base_type with parent_type in nodes | Tristan Gingold | 2020-07-22 | 1 | -9/+8 |
* | vhdl-nodes: reduce size of Iterator_Declaration. | Tristan Gingold | 2020-07-01 | 1 | -3/+3 |
* | vhdl-nodes: add Open_Flag to all generic interfaces. | Tristan Gingold | 2020-06-26 | 1 | -2/+2 |
* | vhdl: create default configuration for a vunit. Fix #1372 | Tristan Gingold | 2020-06-15 | 1 | -4/+20 |
* | Synthesis of PSL prev function. | Tristan Gingold | 2020-06-02 | 1 | -8/+8 |
* | vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662 | Tristan Gingold | 2020-06-02 | 1 | -0/+52 |
* | vhdl-nodes: use a flag field for direction. | Tristan Gingold | 2020-05-20 | 1 | -2/+7 |
* | vhdl: allow attribute specifications in protected types. For #1252 | Tristan Gingold | 2020-04-20 | 1 | -22/+22 |
* | types: introduce Direction_Type, which replaces Iir_Direction. | Tristan Gingold | 2020-04-20 | 1 | -4/+4 |
* | vhdl: add scalar_size. Size of scalar types is computed during analysis. | Tristan Gingold | 2020-04-06 | 1 | -0/+35 |
* | synthesis: add option --vendor-library= for synthesis. | Tristan Gingold | 2020-03-10 | 1 | -0/+16 |
* | ams-vhdl: add support for 'delayed for quantity. | Tristan Gingold | 2019-12-31 | 1 | -0/+1 |
* | ams-vhdl: handle zoh, ltf and ztf attributes. | Tristan Gingold | 2019-12-31 | 1 | -1/+36 |
* | ams-vhdl: add simultaneous null statement. | Tristan Gingold | 2019-12-30 | 1 | -0/+2 |
* | ams-vhdl: check nature for record natures and terminals. | Tristan Gingold | 2019-12-30 | 1 | -0/+16 |
* | vhdl: improve support of AMS-vhdl (array and record natures, source quantities) | Tristan Gingold | 2019-12-28 | 1 | -13/+391 |
* | vhdl: add Has_Delay_Machanism for optional 'inertial' printing. | Tristan Gingold | 2019-12-26 | 1 | -0/+16 |
* | vhdl: add exit/next flags. | Tristan Gingold | 2019-09-18 | 1 | -0/+32 |
* | vhdl: renames Conditional_Expression to Conditional_Expression_Chain. | Tristan Gingold | 2019-09-02 | 1 | -9/+9 |