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* vhdl: fix order of std_ulogic literals. For #1063Tristan Gingold2020-01-021-3/+3
* synth: handle edge operators in synth_predefined_function_call.Tristan Gingold2019-11-061-2/+0
* vhdl: move ieee packages to vhdl children.Tristan Gingold2019-05-051-0/+47