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* Rework errors handling, to have a more generic framework.Tristan Gingold2019-10-061-0/+56
* vhdl: parse verification unit (WIP).Tristan Gingold2019-08-171-0/+2
* vhdl: declare verification units (WIP).Tristan Gingold2019-08-161-0/+6
* Add support for PSL assumptions, used in formal verification (#880)Pepijn de Vos2019-08-071-1/+3
* vhdl: rename Cover_Statement to Cover_Directive.Tristan Gingold2019-07-041-1/+1
* vhdl: parse and analyze restrict directive.Tristan Gingold2019-07-041-0/+2
* vhdl: add anonymous_signal_declaration.Tristan Gingold2019-07-031-0/+3
* vhdl: improve error messages for generate statement.Tristan Gingold2019-06-121-1/+1
* vhdl-errors: avoid a crash on error type.Tristan Gingold2019-06-051-0/+3
* errorout: add messages group instead of continuation.Tristan Gingold2019-05-121-15/+10
* vhdl: minor reformating.Tristan Gingold2019-05-111-4/+3
* vhdl: decouple errorouts a bit more.Tristan Gingold2019-05-101-8/+13
* vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64.Tristan Gingold2019-05-101-3/+3
* Extract psl-errors from errorout.Tristan Gingold2019-05-101-5/+0
* vhdl: extract vhdl.errors from errorout.Tristan Gingold2019-05-081-0/+990