aboutsummaryrefslogtreecommitdiffstats
path: root/src/vhdl/translate/trans-rtis.ads
Commit message (Expand)AuthorAgeFilesLines
* src: Define PSL type RTI with simplified assertion state.Ondrej Ille2021-04-081-0/+7
* update license headersumarcor2021-01-141-11/+9
* translate: improve support of unbounded records and arrays.Tristan Gingold2020-07-251-1/+1
* Add support for PSL assumptions, used in formal verification (#880)Pepijn de Vos2019-08-071-0/+1
* Rework translation of unbounded and complex types.Tristan Gingold2018-10-211-2/+2
* unbounded records: add rti support (WIP)Tristan Gingold2017-02-211-0/+2
* vhdl08: add support of case-generate statementTristan Gingold2016-07-071-0/+1
* PSL: add clocked SERE, make endpoints visible from VHDL.Tristan Gingold2016-03-221-0/+1
* PSL: add counters, generate rti and add --psl-reportTristan Gingold2016-03-181-0/+1
* Rework for vhdl08 generate: change rtis.Tristan Gingold2015-01-041-0/+1
* Split translation into child packages.Tristan Gingold2014-11-091-0/+138