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path: root/src/vhdl/translate/trans-rtis.adb
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* fix: avoid "unnecessary with of ancestor [-gnatwr]" with GCC 12Xiretza2022-05-141-1/+1
* vhdl: remove iir_kind_anonymous_signal_declaration (now unused)Tristan Gingold2021-08-241-6/+3
* src: Define PSL type RTI with simplified assertion state.Ondrej Ille2021-04-081-6/+58
* update license headersumarcor2021-01-141-11/+9
* trans-rtis: adjust max_depth of records. For #1404Tristan Gingold2020-08-261-3/+7
* translate: improve support of unbounded records and arrays.Tristan Gingold2020-07-251-3/+3
* ortho: add unbounded records, rework array subtypes.Tristan Gingold2020-07-251-13/+23
* ortho: add a length parameter to start_array_aggr.Tristan Gingold2020-05-281-20/+8
* vhdl: minimal support of interface package in entities. For #1262Tristan Gingold2020-04-271-1/+2
* vhdl/translate: handle more partially constrained array subtypes. For #1038Tristan Gingold2020-01-061-4/+2
* ignore restrict in simulation (#897)Pepijn de Vos2019-08-201-3/+3
* Add support for PSL assumptions, used in formal verification (#880)Pepijn de Vos2019-08-071-4/+12
* vhdl: rename Cover_Statement to Cover_Directive.Tristan Gingold2019-07-041-4/+4
* vhdl: add anonymous_signal_declaration.Tristan Gingold2019-07-031-3/+6
* vhdl: extract vhdl.errors from errorout.Tristan Gingold2019-05-081-1/+1
* vhdl: move iirs_utils to vhdl.utilsTristan Gingold2019-05-061-1/+1
* vhdl: move configuration package as a vhdl child.Tristan Gingold2019-05-051-2/+2
* trans-rtis: take into account instances in the count of packages.Tristan Gingold2018-11-241-4/+15
* trans-rtis: fix uninitialized variable.Tristan Gingold2018-10-241-3/+8
* Rework translation of unbounded and complex types.Tristan Gingold2018-10-211-122/+127
* translate: remove other use of Nam_Buffer.Tristan Gingold2018-01-201-13/+7
* Rework array/record type mode to improve support of constrained records.Tristan Gingold2018-01-111-15/+19
* Use flist for enumerations.Tristan Gingold2017-11-071-2/+2
* Use Flist for records.Tristan Gingold2017-11-071-3/+2
* Use Flist for array indexes.Tristan Gingold2017-11-061-2/+2
* unbounded records: add rti support (WIP)Tristan Gingold2017-02-211-55/+76
* vhdl08: allow PSL default clock declaration in block declarative parts.Tristan Gingold2017-01-131-0/+5
* WIP for unconstrained records.Tristan Gingold2017-01-131-1/+1
* translate: WIP - refactoring for unbounded records.Tristan Gingold2017-01-021-1/+1
* translate: WIP for unbounded records.Tristan Gingold2017-01-021-1/+1
* translate: refactoring for ortho_info_type.Tristan Gingold2016-12-301-19/+19
* vhdl08: support top-level macro-expanded package instantiation declarations.Tristan Gingold2016-12-051-4/+7
* WIP for nested instantiation of macro-expansed packages.Tristan Gingold2016-11-121-17/+23
* Add signal_attribute_declaration to hold implicit atribute signals.Tristan Gingold2016-10-081-20/+29
* Rework range_expression and incomplete type for instantiation.Tristan Gingold2016-09-301-3/+2
* vhdl08: strengthten nested packages.Tristan Gingold2016-09-121-1/+8
* vhdl08: preliminary work to support nested package bodies.Tristan Gingold2016-09-041-0/+11
* vhdl08: handle very simple nested packages.Tristan Gingold2016-09-031-58/+76
* vhdl08: add support of case-generate statementTristan Gingold2016-07-071-16/+49
* PSL: add clocked SERE, make endpoints visible from VHDL.Tristan Gingold2016-03-221-3/+11
* PSL: add counters, generate rti and add --psl-reportTristan Gingold2016-03-181-30/+51
* ortho: rename start/finish_const_value to start/finish_init_value.Tristan Gingold2016-02-211-44/+44
* Pass signal values to interfaces. 'sigptr' optimization.Tristan Gingold2015-12-181-1/+1
* trans-rtis: fix uninitialized field (that could result in a crash).Tristan Gingold2015-09-151-10/+8
* Replace fat accesses by bounds accessesTristan Gingold2015-08-291-19/+23
* Handle vhdl08 if generate statementsTristan Gingold2015-01-071-186/+302
* Rework for vhdl08 generate: change rtis.Tristan Gingold2015-01-041-82/+193
* Initial rework for vhdl 2008 generate statements.Tristan Gingold2015-01-031-37/+75
* Rename name_table.name_buffer and name_length to avoid clash.Tristan Gingold2014-12-311-6/+6
* Use same node for implicit and explicit subprogram declarations.Tristan Gingold2014-12-151-6/+2
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