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* trans-chap5.adb: handle package association in entities.Tristan Gingold2022-12-231-8/+13
| | | | Fix #2264
* trans-chap5: handle inertial individual association. Fix #2118Tristan Gingold2022-08-111-13/+20
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* vhdl: add support for default in interface subprogram. Fix #2163Tristan Gingold2022-08-071-0/+3
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* Rework inertial associations.Tristan Gingold2021-08-231-3/+11
| | | | | Fix #1625 Fix #1672
* vhdl: introduce iir_kind_association_element_by_nameTristan Gingold2021-08-061-4/+7
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* trans-chap5: use value mode to get object bounds. Fix #1612Tristan Gingold2021-01-191-1/+1
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* update license headersumarcor2021-01-141-11/+9
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* vhdl: handle locally static attributes on entity/architecture/configurationsTristan Gingold2020-12-081-10/+20
| | | | | | | | | | | | | Attributes of entity/architecture/configurations are expected to be locally static so that they can be referenced from outside (so on the non-instantiated entity). But many designs break this assumption. In relaxed mode, non-locally static attributes are allowed but now cannot be referenced outside the entity. Locally static attributes can be referenced from outside. Fix #1528
* translate: minor changes.Tristan Gingold2020-08-041-2/+0
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* translate: add a function to get allocation kind of layout var.Tristan Gingold2020-07-291-1/+1
| | | | Fix #1415
* trans: propagate parent_type changes.Tristan Gingold2020-07-251-1/+1
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* translate: improve support of unbounded records and arrays.Tristan Gingold2020-07-251-4/+7
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* vhdl: improve support of subtype attribute.Tristan Gingold2020-07-181-0/+2
| | | | | A subtype definition does not mean anymore that the subtype is constrained. It is now defined by the subtype indication of the name.
* vhdl/translate: rework object type elaboration. For #641Tristan Gingold2020-06-241-3/+1
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* trans-chap5: handle record subtypes in port association.Tristan Gingold2020-05-131-13/+22
| | | | Part of #1300
* vhdl: minimal support of interface package in entities. For #1262Tristan Gingold2020-04-271-13/+25
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* vhdl: fix crash on vhdl08 sub-sub index constraint. For #1191Tristan Gingold2020-04-071-3/+2
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* vhdl: improve support of AMS-vhdl (array and record natures, source quantities)Tristan Gingold2019-12-281-3/+3
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* vhdl: handle P32 in connect_scalar. Fix #918Tristan Gingold2019-09-051-1/+2
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* vhdl: translate anonymous_signal_declaration.Tristan Gingold2019-07-031-8/+2
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* vhdl: add anonymous_signal_declaration.Tristan Gingold2019-07-031-1/+7
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* vhdl: extract vhdl.errors from errorout.Tristan Gingold2019-05-081-1/+1
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* vhdl: move iirs_utils to vhdl.utilsTristan Gingold2019-05-061-1/+1
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* vhdl/translate: check_composite_match: rename and handle records.Tristan Gingold2019-05-031-3/+4
| | | | Fix #807
* translate: renaming, support constrained unbounded record aggregates.Tristan Gingold2018-12-071-4/+4
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* trans-chap5: do subtype conversion in signal association.Tristan Gingold2018-11-101-2/+10
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* Rework translation of unbounded and complex types.Tristan Gingold2018-10-211-18/+16
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* translation: for port assiation by expression: handle formal before actual.Tristan Gingold2018-02-201-2/+2
| | | | Fix #532
* Translate; properly separates translation of types from translation of subtypes.Tristan Gingold2018-01-171-1/+2
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* trans-chap3: unbox recod in Get_Composite_Base.Tristan Gingold2017-11-271-1/+1
| | | | Fix #467
* Use flist for disconnection specification and component specification.Tristan Gingold2017-11-081-3/+2
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* Rename In_Conversion/Out_Conversion to Actual_Conversion/Formal_Conversion.Tristan Gingold2017-09-131-6/+6
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* translate: renaming.Tristan Gingold2017-06-211-3/+4
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* Fix crash of implicit conversion in instantiation.Tristan Gingold2017-06-121-2/+14
| | | | Fix #301
* Create default value for ports.Tristan Gingold2017-05-091-35/+49
| | | | Fix #328
* Minor optimization: avoid calls to Get_Association_Formal.Tristan Gingold2017-05-081-7/+6
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* vhdl08: unbounded records (WIP - individual association)Tristan Gingold2017-03-091-1/+1
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* translate: WIP - refactoring for unbounded records.Tristan Gingold2017-01-021-1/+1
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* translate: rename get_array_base to get_composite_baseTristan Gingold2017-01-021-3/+3
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* translate: refactoring for ortho_info_type.Tristan Gingold2016-12-301-6/+6
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* canon: do not set formal of association by position.Tristan Gingold2016-10-191-23/+30
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* Rework AST to setup ownership and reference policy.Tristan Gingold2016-10-111-2/+2
| | | | Check it with nodes_gc.
* Fix attribute specification with non-static expressionTristan Gingold2016-10-041-9/+32
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* Emit error message during analysis for missing generic association.Tristan Gingold2016-10-011-0/+1
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* vhdl08: more support for interface subprograms.Tristan Gingold2016-09-271-1/+2
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* vhdl08: handle interface type in generic-mapped packageTristan Gingold2016-09-151-0/+2
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* Enable vest recursive instantiation test.Tristan Gingold2016-07-031-5/+11
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* Initial support of direct recursive instantiation.Tristan Gingold2016-07-031-116/+160
| | | | Fix issue #2.
* translation: avoid memory leak while allocating ports.Tristan Gingold2016-03-161-2/+3
| | | | Issue found in bug040.
* Set type staticness for a constant declaration and attribute specification.Tristan Gingold2016-01-111-10/+11
| | | | Fix for issue 10.
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