| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | simulation: use invalid_instance_slot instead of 0. | Tristan Gingold | 2015-01-24 | 2 | -4/+4 |
| * | Simulation: renaming. | Tristan Gingold | 2015-01-23 | 6 | -133/+118 |
| * | simulation: rework scope_level. | Tristan Gingold | 2015-01-23 | 6 | -123/+157 |
| * | Style fixes. | Tristan Gingold | 2015-01-18 | 1 | -1/+2 |
| * | simulation: adjust for vhdl08 configurations. | Tristan Gingold | 2015-01-18 | 1 | -39/+38 |
| * | execution: fix v87 concat with element. | Tristan Gingold | 2015-01-18 | 1 | -20/+24 |
| * | simulation: handle v87 concatenation. | Tristan Gingold | 2015-01-17 | 1 | -41/+74 |
| * | debugger: add list command. | Tristan Gingold | 2015-01-17 | 1 | -18/+117 |
| * | ghdlsimul: adjust after use of name for block_specification. | Tristan Gingold | 2015-01-17 | 1 | -1/+2 |
| * | Fix build of ghdl_simul (WIP). | Tristan Gingold | 2015-01-16 | 6 | -268/+233 |
| * | Move translate and simulate. | Tristan Gingold | 2014-11-05 | 24 | -0/+15671 |
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index : iCE40/ghdl | |
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