| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | vhdl: replace base_type with parent_type in nodes | Tristan Gingold | 2020-07-22 | 1 | -0/+1 |
| * | types: introduce Direction_Type, which replaces Iir_Direction. | Tristan Gingold | 2020-04-20 | 1 | -22/+19 |
| * | vhdl: decouple annotations from environments. | Tristan Gingold | 2019-06-19 | 1 | -0/+1 |
| * | Add simple_IO - to be used instead of Text_IO. | Tristan Gingold | 2019-05-19 | 1 | -11/+10 |
| * | simul: refactoring. | Tristan Gingold | 2019-01-11 | 1 | -4/+10 |
| * | simul-debugger: improve info signals. | Tristan Gingold | 2017-12-21 | 1 | -14/+22 |
| * | simul: handle package interface, remove iir_value_environment. | Tristan Gingold | 2017-12-05 | 1 | -32/+7 |
| * | simul: add iir_value_instance, remove package_instances. | Tristan Gingold | 2017-12-03 | 1 | -2/+25 |
| * | Create the simul.ads package (for a namespace). | Tristan Gingold | 2017-11-24 | 1 | -0/+1127 |
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index : iCE40/ghdl | |
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