aboutsummaryrefslogtreecommitdiffstats
path: root/src/vhdl/iirs.ads
Commit message (Expand)AuthorAgeFilesLines
* Remove Get/Set_Value_Staticness, add Get/Set_Aggregate_Expand_FlagTristan Gingold2016-12-201-10/+10
* iirs: reorder Iir_Kind_Choice_*, add Get_Literal_Origin for aggregate.Tristan Gingold2016-12-181-6/+30
* cleanup: remove Package_Instantiation_Bodies_ChainTristan Gingold2016-12-051-8/+0
* sem_assocs: handle overloaded operators for interface_functionTristan Gingold2016-12-051-8/+9
* iirs: add Iir_Predefined_IEEE_Explicit subtype.Tristan Gingold2016-11-111-0/+5
* ownership: check tree after sem and canon.Tristan Gingold2016-11-051-36/+49
* ghdlxml: display image of string_literal8Tristan Gingold2016-11-011-0/+2
* vhdl08: allow unaffected in sequential signal assignments.Tristan Gingold2016-11-011-0/+5
* Add translation for selected signal assignment.Tristan Gingold2016-11-011-0/+9
* Remove default_*_map_aspect from binding_indication.Tristan Gingold2016-10-201-12/+0
* ownership: fix arrays and physical types from parse.Tristan Gingold2016-10-181-17/+20
* iirs: add an assert on Get_Kind.Tristan Gingold2016-10-181-7/+7
* nodes: remove Int and Fp formats, use multiple fields.Tristan Gingold2016-10-151-10/+10
* nodes: handle 'grp' conversion, replace Odigit1 by flags.Tristan Gingold2016-10-151-7/+7
* iirs: rename base_type to number_base_type to avoid confusion.Tristan Gingold2016-10-131-3/+3
* iirs: condition_expression is a chain.Tristan Gingold2016-10-131-1/+1
* Rework AST to setup ownership and reference policy.Tristan Gingold2016-10-111-179/+285
* Add signal_attribute_declaration to hold implicit atribute signals.Tristan Gingold2016-10-081-3/+36
* disp_vhdl: print 'parameter' if textually present.Tristan Gingold2016-10-051-0/+9
* iirs: subtype indication is never a ref.Tristan Gingold2016-10-051-18/+8
* Fix attribute specification with non-static expressionTristan Gingold2016-10-041-3/+0
* Rework range_expression and incomplete type for instantiation.Tristan Gingold2016-09-301-18/+58
* Comments in iirs.adsTristan Gingold2016-09-281-17/+37
* Refine error message for issue #148.Tristan Gingold2016-09-271-0/+11
* vhdl08: more support for interface subprograms.Tristan Gingold2016-09-271-0/+9
* vhdl08: preliminary support of interface subprogramTristan Gingold2016-09-251-5/+17
* Add an analysis time check for bounds on port association.Tristan Gingold2016-09-241-1/+2
* vhdl08: first working example of interface type.Tristan Gingold2016-09-221-2/+9
* iirs: add association_element_subprogramTristan Gingold2016-09-201-0/+5
* vhdl08: create interface subprogram declaration.Tristan Gingold2016-09-191-7/+63
* vhdl08: preliminary work for package body instantiation.Tristan Gingold2016-09-181-14/+23
* Handle macro-expansion of instantiation of declaration with interface type.Tristan Gingold2016-09-161-0/+16
* Handle expanded name for interface package.Tristan Gingold2016-09-121-0/+2
* iirs: add Iir_Kinds_Simple_Concurrent_StatementTristan Gingold2016-09-121-5/+22
* vhdl08: preliminary work for nested package and type association.Tristan Gingold2016-09-011-20/+35
* vhdl08: parse and analyze interface types.Tristan Gingold2016-09-011-0/+58
* Avoid a crash with postponed assertions in vhdl08Tristan Gingold2016-08-271-0/+2
* Avoid a crash on bad component name.Tristan Gingold2016-08-261-0/+5
* Clean up links, repository-wide (#117)Ben Wiederhake2016-07-091-1/+1
* vhdl08: add support of case-generate statementTristan Gingold2016-07-071-4/+16
* Parse case generate statement.Tristan Gingold2016-07-051-0/+24
* parse: extract parse_case_statement.Tristan Gingold2016-07-051-1/+1
* Fix indentation and English mistakes.Tristan Gingold2016-07-051-3/+3
* Initial support of direct recursive instantiation.Tristan Gingold2016-07-031-0/+16
* Remove Get/Set_Type_ReferenceTristan Gingold2016-06-011-8/+0
* vhdl2008: implement new 'use clause' rules for types.Tristan Gingold2016-05-311-26/+87
* Adjust previous patch (detect incorrect use of PSL endpoint in expressions)Tristan Gingold2016-03-231-0/+2
* PSL: add clocked SERE, make endpoints visible from VHDL.Tristan Gingold2016-03-221-0/+8
* Create psl_endpoint_declaration.Tristan Gingold2016-03-201-3/+28
* psl: cover directive works on a sequence, not on a property.Tristan Gingold2016-02-141-0/+8
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 04:17:06 +0000