| Commit message (Expand) | Author | Age | Files | Lines |
* | vhdl-nodes: make Subtype_Indication Maybe_Ref. For #641 | Tristan Gingold | 2020-06-30 | 1 | -2/+2 |
* | synth: handle std_logic_signed.conv_integer. For ghdl/ghdl-yosys-plugin#126 | Tristan Gingold | 2020-06-19 | 1 | -5/+6 |
* | synth: handle to_x01. For ghdl/ghdl-yosys-plugin#126 | Tristan Gingold | 2020-06-19 | 1 | -6/+10 |
* | synth: avoid crash on invalid range. For ghdl/ghdl-yosys-plugin#126 | Tristan Gingold | 2020-06-19 | 2 | -9/+15 |
* | synth-oper: handle add_uns_int_slv. For ghdl/ghdl-yosys-plugin#126 | Tristan Gingold | 2020-06-18 | 1 | -1/+2 |
* | ghdlsynth: add --no-formal and help. | Tristan Gingold | 2020-06-16 | 2 | -0/+29 |
* | vhdl: create default configuration for a vunit. Fix #1372 | Tristan Gingold | 2020-06-15 | 2 | -1/+4 |
* | synth: handle slices for PSL prev and stable. Fix #1367 | Tristan Gingold | 2020-06-12 | 1 | -2/+2 |
* | vhdl: analyze and synth concurrent statements in vunit. Fix #1366 | Tristan Gingold | 2020-06-12 | 1 | -1/+6 |
* | Synthesis of PSL built-in fell() function. | tmeissner | 2020-06-07 | 1 | -4/+36 |
* | Synthesis of PSL built-in rose() function. | tmeissner | 2020-06-06 | 1 | -0/+33 |
* | Synthesis of PSL stable() function. | tmeissner | 2020-06-06 | 1 | -11/+49 |
* | netlists-memories: simplify addresses when using a 'to' range. Fix #1348 | Tristan Gingold | 2020-06-02 | 1 | -0/+264 |
* | netlists-gates.ads: add comments. | Tristan Gingold | 2020-06-02 | 1 | -6/+8 |
* | netlists-memories: clean up: remove handling of dff/idff in chains. | Tristan Gingold | 2020-06-02 | 1 | -57/+28 |
* | netlists-memories: handle another merge of dff in read ports. For #1348 | Tristan Gingold | 2020-06-02 | 1 | -3/+154 |
* | Synthesis of PSL prev function. | Tristan Gingold | 2020-06-02 | 3 | -69/+120 |
* | netlists-dump: shorten UB32 constants. | Tristan Gingold | 2020-05-31 | 1 | -1/+5 |
* | synth: improve support of true dual port rams. For #1069 | Tristan Gingold | 2020-05-31 | 3 | -7/+9 |
* | netlists-inference: minor refactoring. | Tristan Gingold | 2020-05-31 | 1 | -79/+64 |
* | netlists-inference: add comments, reorder subprograms. | Tristan Gingold | 2020-05-31 | 1 | -70/+63 |
* | synth: refine -dm debug option. Add -dm2 | Tristan Gingold | 2020-05-31 | 3 | -3/+6 |
* | netlists-memories: cleanup. | Tristan Gingold | 2020-05-29 | 2 | -47/+4 |
* | netlists: rework clock handling in memories. | Tristan Gingold | 2020-05-29 | 4 | -83/+108 |
* | netlists: handle UL32 in memory initial value. | Tristan Gingold | 2020-05-29 | 2 | -4/+27 |
* | netlists-inference: factorize code. | Tristan Gingold | 2020-05-29 | 1 | -54/+45 |
* | synth: handle reduction operators. Fix #1342 | Tristan Gingold | 2020-05-27 | 6 | -21/+56 |
* | synth-oper: add support for conv_vector. | Tristan Gingold | 2020-05-27 | 1 | -2/+3 |
* | ghdlsynth.h: add API for attributes. For #1318 | Tristan Gingold | 2020-05-23 | 1 | -0/+7 |
* | netlists: disp attributes in vhdl output (as comments). For #1318 | Tristan Gingold | 2020-05-23 | 3 | -20/+97 |
* | netlists: complete support of attributes. For #1318 | Tristan Gingold | 2020-05-23 | 5 | -5/+102 |
* | netlists: use dyn_maps package for attributes. | Tristan Gingold | 2020-05-22 | 2 | -27/+19 |
* | netlists: add param_pval_boolean. | Tristan Gingold | 2020-05-22 | 3 | -8/+12 |
* | netlists-memories: set location on utrunc. Fix #1332 | Tristan Gingold | 2020-05-21 | 3 | -11/+13 |
* | synth: add support for ascending attribute. Fix #1333 | Tristan Gingold | 2020-05-21 | 1 | -0/+15 |
* | netlists: initial support of attributes. | Tristan Gingold | 2020-05-21 | 3 | -27/+123 |
* | synth-oper: fix handle of add/sub with std_logic. | Tristan Gingold | 2020-05-21 | 1 | -21/+21 |
* | netlists-disp_vhdl: fix id_sextend for 1 bit. | Tristan Gingold | 2020-05-21 | 1 | -1/+1 |
* | synth: handle more operators from std_logic_arith. Fix synth121 | Tristan Gingold | 2020-05-21 | 1 | -13/+19 |
* | netlists-inference: Fix sequential assertions at init. Fix #1330 | Tristan Gingold | 2020-05-21 | 1 | -12/+17 |
* | synth: create abstractions for Pval (from synth-insts to synth-decls) | Tristan Gingold | 2020-05-20 | 3 | -43/+59 |
* | synth-decls: handle unbounded record subtypes. Fix #1324 | Tristan Gingold | 2020-05-19 | 1 | -33/+15 |
* | vhdl-nodes: Rename and move shift/rotate predefined functions. Fix #1325 | Tristan Gingold | 2020-05-19 | 2 | -13/+10 |
* | netlists: initial infrastructure for attributes. For #1318 | Tristan Gingold | 2020-05-19 | 2 | -7/+62 |
* | WIP: netlists: reuse free instances. | Tristan Gingold | 2020-05-18 | 1 | -37/+220 |
* | netlists: make free_instance private and remove_instance public. | Tristan Gingold | 2020-05-18 | 1 | -6/+4 |
* | netlists: improve stats. | Tristan Gingold | 2020-05-18 | 1 | -3/+73 |
* | netlits: Use Remove_Instance instead of Free_Instance. | Tristan Gingold | 2020-05-18 | 5 | -44/+11 |
* | netlists: add disp_stats. | Tristan Gingold | 2020-05-18 | 2 | -0/+33 |
* | netlists: add more flags in Module_Record. | Tristan Gingold | 2020-05-18 | 2 | -15/+27 |