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synth
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Author
Age
Files
Lines
*
netlists-builders: add build2_uresize.
Tristan Gingold
2019-11-03
2
-0
/
+31
*
synth: fix multiport read memories (for issue #1000)
Tristan Gingold
2019-11-03
1
-1
/
+3
*
synth: cap max in synth_slice_suffix
Tristan Gingold
2019-11-03
1
-1
/
+8
*
netlists-expands: rewrite generate_muxes.
Tristan Gingold
2019-11-03
1
-24
/
+102
*
netlists-expands: use a safe walk.
Tristan Gingold
2019-11-03
1
-1
/
+3
*
synth: add support for inout variable interfaces.
Tristan Gingold
2019-11-01
2
-3
/
+4
*
synth-values: handle value_const for is_equal.
Tristan Gingold
2019-11-01
1
-0
/
+5
*
synth: handle nested if generate statements.
Tristan Gingold
2019-11-01
2
-21
/
+29
*
netlits: fix memidx order.
Tristan Gingold
2019-11-01
2
-39
/
+52
*
netlists-dump: improve output.
Tristan Gingold
2019-11-01
1
-10
/
+11
*
netlists-expands: expand dyn_insert
Tristan Gingold
2019-11-01
2
-42
/
+174
*
ghdlsynth_gates.h: regenerate.
Tristan Gingold
2019-10-31
1
-0
/
+4
*
synth: handle attributes in vunit.
Tristan Gingold
2019-10-30
1
-1
/
+86
*
netlists: add formal input gates.
Tristan Gingold
2019-10-30
3
-0
/
+44
*
netlists-expands: handle 2d arrays.
Tristan Gingold
2019-10-28
1
-83
/
+72
*
synth: adjust computation of max for dyn_extract.
Tristan Gingold
2019-10-28
3
-8
/
+10
*
netlists-disp_vhdl: prefix of strunc/utrunc cannot be a constant.
Tristan Gingold
2019-10-28
1
-1
/
+3
*
synth-expr (synth_slice_suffix): compute max value for slices.
Tristan Gingold
2019-10-27
1
-1
/
+4
*
netlists-expand: truncate address if needed.
Tristan Gingold
2019-10-27
1
-0
/
+10
*
netlists: add code to expand dyn_extract gates (WIP).
Tristan Gingold
2019-10-27
5
-1
/
+259
*
netlists: change Loc parameter of synth_case.
Tristan Gingold
2019-10-27
5
-6
/
+21
*
synth: create build2_concat from netlists-concat.
Tristan Gingold
2019-10-27
7
-38
/
+48
*
netlists-butils: extract synth_case from synth.stmts.
Tristan Gingold
2019-10-26
3
-149
/
+206
*
synth: handle concurrent signal assignment in vunits.
Tristan Gingold
2019-10-25
1
-83
/
+89
*
synth: add support for declarations in vunits.
Tristan Gingold
2019-10-23
2
-4
/
+27
*
netlists-dump: dump input net width.
Tristan Gingold
2019-10-23
1
-0
/
+2
*
Regenerate ghdlsynth_gates.h
Tristan Gingold
2019-10-21
1
-0
/
+1
*
synth: generate cover for assertion precedent.
Tristan Gingold
2019-10-21
5
-84
/
+103
*
nelists-memories: reject memories with reset.
Tristan Gingold
2019-10-21
1
-1
/
+4
*
synth-stmts: set location of muxes on case statements.
Tristan Gingold
2019-10-21
1
-6
/
+13
*
synth: fixes for value_const.
Tristan Gingold
2019-10-20
2
-0
/
+11
*
netlists-memories: fixes in ROM.
Tristan Gingold
2019-10-20
1
-48
/
+51
*
netlists-disp_vhdl: display memory initialization value.
Tristan Gingold
2019-10-20
1
-2
/
+46
*
synth: add value_const.
Tristan Gingold
2019-10-20
7
-9
/
+69
*
netlists-memories: preliminary work to handle ROM.
Tristan Gingold
2019-10-20
1
-111
/
+194
*
synth: add more locations.
Tristan Gingold
2019-10-20
2
-0
/
+2
*
netlists-dump: also dump instances location.
Tristan Gingold
2019-10-20
1
-6
/
+34
*
synth: use note messages for memories (instead of warnings).
Tristan Gingold
2019-10-19
4
-28
/
+34
*
ghdlsynth.h: add functions.
Tristan Gingold
2019-10-19
1
-0
/
+4
*
Regenerate ghdlsynth_gates.h
Tristan Gingold
2019-10-18
1
-0
/
+5
*
netlists-memories: check ports.
Tristan Gingold
2019-10-18
1
-7
/
+161
*
synth-stmts: ignore EOS in PSL expressions.
Tristan Gingold
2019-10-18
1
-1
/
+8
*
netlists-disp_vhdl: display memories.
Tristan Gingold
2019-10-17
1
-1
/
+97
*
synth: add netlists-memories to extract memories. Still WIP.
Tristan Gingold
2019-10-17
7
-18
/
+550
*
netlists: add remove_instance.
Tristan Gingold
2019-10-16
2
-0
/
+35
*
synth: fix psl cover - test when the final state is reached.
Tristan Gingold
2019-10-15
1
-3
/
+14
*
vhdl: handle cover and restrict within vunit.
Tristan Gingold
2019-10-15
1
-0
/
+2
*
synth: handle overflow literal.
Tristan Gingold
2019-10-15
1
-0
/
+9
*
netlists: declare memory gates.
Tristan Gingold
2019-10-15
3
-3
/
+215
*
synth-expr: handle any discrete_range in aggregate choices.
Tristan Gingold
2019-10-15
1
-1
/
+2
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