| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | synth-vhdl_expr: add an hook for signal attributes | Tristan Gingold | 2022-06-08 | 1 | -0/+5 |
| * | synth: use unidimentional arrays in type_acc. Factorize code. | Tristan Gingold | 2022-05-22 | 1 | -0/+1 |
| * | synth-vhdl_expr: add an hook to get the value of a signal | Tristan Gingold | 2022-05-12 | 1 | -0/+6 |
| * | synth: handle concatenation of unbounded types. Fix #1993 | Tristan Gingold | 2022-03-08 | 1 | -9/+0 |
| * | synth: properly propagate bound errors. Fix #1972 | Tristan Gingold | 2022-02-17 | 1 | -1/+2 |
| * | synth: do full elaboration before synthesis | Tristan Gingold | 2021-11-01 | 1 | -23/+11 |
| * | synth: file renaming for decls, expr, insts and stmts. | Tristan Gingold | 2021-04-28 | 1 | -0/+152 |
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index : iCE40/ghdl | |
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