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path: root/src/synth/synth-insts.adb
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* synth-expr: handle any object for array attributes.Tristan Gingold2020-03-261-49/+0
* synth: improve propagation of errors.Tristan Gingold2020-03-251-7/+17
* synth: preliminary work for package instantiation. For #1159Tristan Gingold2020-03-231-45/+1
* synth: add id_inout gate to handle inout behaviour. Fir #1166Tristan Gingold2020-03-231-13/+31
* synth-disp_vhdl: do not wrap inout ports. For #1166Tristan Gingold2020-03-221-12/+25
* synth-insts: also handle indexed name for synth_type_of_object. Fix #1164Tristan Gingold2020-03-191-0/+8
* synth-insts: handle record in generics.Tristan Gingold2020-03-131-12/+22
* synth-insts: handle output individual assoc for components.Tristan Gingold2020-03-131-18/+3
* synth-insts: handle input individual associations for components.Tristan Gingold2020-03-131-55/+49
* synthesis: handle initialized output ports.Tristan Gingold2020-03-071-3/+17
* synth: top entity name is not anymore hashed by default.Tristan Gingold2020-03-011-73/+88
* synth-insts: add comments, minor refactoring.Tristan Gingold2020-02-291-5/+2
* synth-insts: handle slices in individual associations.Tristan Gingold2020-02-181-0/+21
* synth-expr: handle anonymous signal declarations.Tristan Gingold2020-02-181-4/+4
* synth: handle component with ports in different order.Tristan Gingold2020-02-131-15/+18
* synth: remove remaining clock edge gates after memories.Tristan Gingold2020-02-101-0/+2
* synth-insts: clear before applying block configuration. Fix #1095Tristan Gingold2020-01-151-0/+2
* netlists: use a mark and sweep cleanup.Tristan Gingold2020-01-151-1/+2
* synth-insts: handle slice name as actual to unboundedTristan Gingold2020-01-131-0/+20
* synth-insts: handle unbounded ports in components.Tristan Gingold2020-01-131-39/+49
* synth: use formal instance to evaluate default value. For #1080Tristan Gingold2020-01-121-1/+4
* synth: consider ports size to create unique instances.Tristan Gingold2020-01-101-49/+86
* synth: simplify support of inertial associations.Tristan Gingold2020-01-091-0/+8
* vhdl: improve support of AMS-vhdl (array and record natures, source quantities)Tristan Gingold2019-12-281-1/+1
* netlists: add remove_output_gates.Tristan Gingold2019-12-051-0/+1
* netlists-memories: rework.Tristan Gingold2019-12-051-1/+1
* synth: create unique instance name. Fix #1007Tristan Gingold2019-12-031-4/+152
* synth-insts: use current prefix for instantiations. Fix #1048Tristan Gingold2019-12-011-1/+2
* netlists: remove port API (make it easier to interface).Tristan Gingold2019-11-281-9/+5
* netlists: remove port_inout.Tristan Gingold2019-11-281-16/+8
* synth: rework the sname API.Tristan Gingold2019-11-281-16/+20
* synth: infrastructure for debugger.Tristan Gingold2019-11-201-0/+5
* synth: elaborate packages body.Tristan Gingold2019-11-171-13/+9
* synth: renames Is_Const to Is_Static.Tristan Gingold2019-11-131-2/+2
* synth-expr: handle static values inTristan Gingold2019-11-131-0/+3
* synth-insts: add support for unbounded ports.Tristan Gingold2019-11-121-4/+51
* synth-insts: add support for individual associations.Tristan Gingold2019-11-121-34/+243
* synth-decls: handle unassigned signal/object. For issue 65Tristan Gingold2019-11-071-0/+2
* synth: handle nested if generate statements.Tristan Gingold2019-11-011-0/+2
* netlists: add code to expand dyn_extract gates (WIP).Tristan Gingold2019-10-271-0/+5
* synth: add more locations.Tristan Gingold2019-10-201-0/+1
* synth: add netlists-memories to extract memories. Still WIP.Tristan Gingold2019-10-171-0/+5
* synth-insts: accept architecture instantiation in synth_dependencies.Tristan Gingold2019-10-151-2/+3
* synth-inst: minor refactoring.Tristan Gingold2019-10-131-3/+2
* synth: rewrite cleanup pass.Tristan Gingold2019-10-101-2/+2
* synth: set name on generate statements.Tristan Gingold2019-10-091-1/+2
* synth: set location on instances.Tristan Gingold2019-10-091-0/+1
* synth: use synth.source for setting location.Tristan Gingold2019-10-091-0/+1
* synth: handle package bodies.Tristan Gingold2019-10-071-1/+21
* synth: preliminary support for user packages.Tristan Gingold2019-10-071-0/+44
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