Commit message (Collapse) | Author | Age | Files | Lines | |
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* | netlists-rename: handle handle signal instances. Fix #2093 | Tristan Gingold | 2022-06-15 | 1 | -0/+6 |
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* | src/synth: add netlists.rename to rename identifiers. Fix #2054 | Tristan Gingold | 2022-06-14 | 1 | -2/+0 |
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* | netlists: fix incorrect access (realloc). Fix #2046 | Tristan Gingold | 2022-05-02 | 1 | -8/+11 |
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* | synth: put direction into port desc | Tristan Gingold | 2021-11-17 | 1 | -2/+2 |
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* | synth: use a global table for instances attributes | Tristan Gingold | 2021-11-17 | 1 | -41/+39 |
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* | synth: renaming to instance_attributes. | Tristan Gingold | 2021-11-17 | 1 | -25/+27 |
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* | synth: add ports attributes | Tristan Gingold | 2021-11-17 | 1 | -0/+103 |
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* | Add comments | Tristan Gingold | 2021-11-17 | 1 | -0/+2 |
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* | netlists: do not remove net gates that have an attribute | Tristan Gingold | 2021-03-17 | 1 | -1/+6 |
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* | synth: handle attributes of length 0. Fix #1680 | Tristan Gingold | 2021-03-13 | 1 | -2/+2 |
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* | update license headers | umarcor | 2021-02-05 | 1 | -5/+3 |
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* | netlists: complete support of attributes. For #1318 | Tristan Gingold | 2020-05-23 | 1 | -2/+65 |
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* | netlists: use dyn_maps package for attributes. | Tristan Gingold | 2020-05-22 | 1 | -15/+11 |
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* | netlists: initial support of attributes. | Tristan Gingold | 2020-05-21 | 1 | -17/+46 |
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* | netlists: initial infrastructure for attributes. For #1318 | Tristan Gingold | 2020-05-19 | 1 | -4/+43 |
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* | WIP: netlists: reuse free instances. | Tristan Gingold | 2020-05-18 | 1 | -37/+220 |
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* | netlists: improve stats. | Tristan Gingold | 2020-05-18 | 1 | -3/+73 |
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* | netlits: Use Remove_Instance instead of Free_Instance. | Tristan Gingold | 2020-05-18 | 1 | -1/+7 |
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* | netlists: add disp_stats. | Tristan Gingold | 2020-05-18 | 1 | -0/+30 |
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* | netlists: add more flags in Module_Record. | Tristan Gingold | 2020-05-18 | 1 | -0/+4 |
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* | netlists-expands: remove memidx gates after expansion. | Tristan Gingold | 2020-05-18 | 1 | -0/+1 |
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* | synth: preliminary work to export module parameters. | Tristan Gingold | 2020-03-31 | 1 | -0/+110 |
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* | synth-disp_vhdl: do not wrap inout ports. For #1166 | Tristan Gingold | 2020-03-22 | 1 | -1/+3 |
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* | synth: handle reuse of inferred dff in the same process. | Tristan Gingold | 2020-03-22 | 1 | -0/+1 |
| | | | | Fix tgingold/ghdlsynth-beta#93 | ||||
* | synth: rework (again) memory inference. | Tristan Gingold | 2020-02-10 | 1 | -11/+10 |
| | | | | | | Preliminary work to support multi-clock memories. Strengthen and fix fallout of Check_Connected. Rename synth.inference to netlists.inference. | ||||
* | netlists: use a mark and sweep cleanup. | Tristan Gingold | 2020-01-15 | 1 | -0/+1 |
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* | netlists: remove port API (make it easier to interface). | Tristan Gingold | 2019-11-28 | 1 | -29/+52 |
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* | netlists: remove port_inout. | Tristan Gingold | 2019-11-28 | 1 | -1/+1 |
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* | synth: rework the sname API. | Tristan Gingold | 2019-11-28 | 1 | -14/+7 |
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* | synth/netlists: remove unused function. | Tristan Gingold | 2019-11-28 | 1 | -7/+0 |
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* | netlists: add 2 flags per instance, including a mark flag. | Tristan Gingold | 2019-11-11 | 1 | -0/+18 |
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* | netlists: add remove_instance. | Tristan Gingold | 2019-10-16 | 1 | -0/+32 |
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* | netlists: give a name to the free module. | Tristan Gingold | 2019-10-10 | 1 | -2/+4 |
| | | | | In order to avoid crashes in dumps. | ||||
* | synth: rewrite cleanup pass. | Tristan Gingold | 2019-10-10 | 1 | -0/+40 |
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* | netlists: remove get_parent renaming for input. | Tristan Gingold | 2019-10-06 | 1 | -1/+1 |
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* | netlists: remove renaming of Get_Parent for Net. | Tristan Gingold | 2019-10-06 | 1 | -1/+1 |
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* | netlists: remove get_name renaming for modules. | Tristan Gingold | 2019-10-06 | 1 | -1/+1 |
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* | synth: allow entities with no ports. | Tristan Gingold | 2019-09-25 | 1 | -1/+0 |
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* | synth-inference: detect false loop. | Tristan Gingold | 2019-09-17 | 1 | -0/+5 |
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* | synth: add support for memories. | Tristan Gingold | 2019-07-29 | 1 | -5/+14 |
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* | synth: use original entity to display netlist. | Tristan Gingold | 2019-07-23 | 1 | -0/+6 |
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* | synth: remove bounds (unused) for ports. | Tristan Gingold | 2019-07-22 | 1 | -3/+1 |
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* | synth: add concatn gate | Tristan Gingold | 2019-07-19 | 1 | -18/+49 |
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* | synth: display instances in reverse order. | Tristan Gingold | 2019-07-10 | 1 | -5/+13 |
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* | synth: Move get_input_net to netlists.utils. | Tristan Gingold | 2019-06-28 | 1 | -5/+0 |
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* | synth: add get_input_net helper. | Tristan Gingold | 2019-06-28 | 1 | -0/+5 |
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* | synth: defer gates removal after at end of entity synthesis. | Tristan Gingold | 2017-02-15 | 1 | -22/+16 |
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* | Add netlist generation infrastructure. | Tristan Gingold | 2017-01-31 | 1 | -0/+812 |