| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | synth: disp_vhdl: merge literals. | Tristan Gingold | 2019-06-28 | 1 | -88/+129 |
| * | synth: Move get_input_net to netlists.utils. | Tristan Gingold | 2019-06-28 | 1 | -1/+1 |
| * | synth: fix disp_vhdl. Can now be analyzed. | Tristan Gingold | 2019-06-28 | 1 | -68/+159 |
| * | synth: disp_vhdl: handle mux2 | Tristan Gingold | 2019-06-28 | 1 | -3/+28 |
| * | synth: add get_input_net helper. | Tristan Gingold | 2019-06-28 | 1 | -8/+8 |
| * | synth: disp_vhdl: add disp_template. | Tristan Gingold | 2019-06-28 | 1 | -23/+46 |
| * | synth: improve disp_vhdl. | Tristan Gingold | 2019-06-28 | 1 | -80/+232 |
| * | netlist-disp_vhdl: display parameters, fix output | Tristan Gingold | 2019-06-12 | 1 | -11/+45 |
| * | synth: add disp_vhdl. | Tristan Gingold | 2019-05-21 | 1 | -0/+239 |
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index : iCE40/ghdl | |
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