Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | synth: regenerate ghdlsynth_gates.h | Tristan Gingold | 2019-07-31 | 1 | -3/+4 |
* | add port width utility function for yosys (#876) | Pepijn de Vos | 2019-07-21 | 1 | -0/+3 |
* | synth: add > and >= operators (#870) | Pepijn de Vos | 2019-07-16 | 1 | -23/+24 |
* | netlists: add assume gate. | Tristan Gingold | 2019-07-04 | 1 | -0/+1 |
* | synth: handle concurrent assertions. | Tristan Gingold | 2019-07-02 | 1 | -0/+1 |
* | ghdlsynth_gates.h: rebuild. | Tristan Gingold | 2019-07-02 | 1 | -29/+33 |
* | Add netlist generation infrastructure. | Tristan Gingold | 2017-01-31 | 1 | -0/+60 |