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* psl: remove start loops only in case of always.Tristan Gingold2023-03-153-1/+24
| | | | For #2392
* psl-optimize: add commentsTristan Gingold2023-03-081-1/+6
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* psl-disp_nfas: improve outputTristan Gingold2023-03-081-7/+9
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* psl-build.adb(build_plus_repeat): fix handling of single edge NFATristan Gingold2023-03-081-3/+15
| | | | For #2373
* psl-build: fix fusion with epsilon. Fix #2336Tristan Gingold2023-01-311-0/+1
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* PSL: optimize True for goto_repeatTristan Gingold2023-01-311-5/+17
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* psl-disp_nfas: add Dump_NFATristan Gingold2023-01-312-0/+57
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* psl-build.adb: handle sync_abort. Fix #2266Tristan Gingold2022-12-071-1/+2
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* psl-rewrites: minor style changeTristan Gingold2022-08-161-2/+1
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* vhdl-prints: improve handling of PSL. For #2178Tristan Gingold2022-08-155-58/+109
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* PSL: Add handling of N_HDL_Bool to Dump_Expr procedure (#2158)T. Meissner2022-08-041-1/+2
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* psl-build.adb: disable incorrect optimization. Fix #2157Tristan Gingold2022-08-032-2/+5
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* psl-nodes: add commentsTristan Gingold2022-07-301-0/+2
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* psl-rewrites.adb: fix inclusive before. Fix #2153Tristan Gingold2022-07-291-1/+3
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* synth: add support for sequence instance in vunit. Fix #1889Tristan Gingold2021-10-131-1/+2
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* vhdl,psl: abort is now identical to async_abort. For #1654Tristan Gingold2021-09-021-3/+2
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* trans-chap9.adb: handle async_abort, sync_abort. Fix #1654Tristan Gingold2021-08-302-0/+22
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* vhdl and psl: parse sync_abort and async_abort. For #1654Tristan Gingold2021-08-307-38/+82
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* PSL: handle inf in star repeat sequence. Fix #1832Tristan Gingold2021-08-267-7/+28
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* psl: suffix implication are properties (for simple subset). For #1721Tristan Gingold2021-04-133-6/+5
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* psl-subsets: fix fallout of #1708Tristan Gingold2021-04-031-2/+3
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* psl: prefix of goto/non-consecutive repetition is a bool. Fix #1708Tristan Gingold2021-04-033-20/+27
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* psl, vhdl: Extend semantic pass for PSL to allow "assert never <Sequence>" ↵Ondrej Ille2021-03-281-0/+1
| | | | with suffixed repetition operator without surrounding sequence braces.
* psl-subsets.adb: allow optionnal sequence to plus repeat. Fix #1698Tristan Gingold2021-03-271-3/+2
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* update license headersumarcor2021-02-053-33/+27
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* update license headersumarcor2021-01-1435-385/+315
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* scripts: move 'pyGHDL/xtools' to 'scripts', update Makefiles and docs ↵umarcor2020-12-281-2/+9
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* vhdl-sem_psl: avoid a crash in synth on incorrect clock.Tristan Gingold2020-06-301-0/+1
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* vhdl psl: add support for equivalence operator. Fix #1371Tristan Gingold2020-06-167-177/+237
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* psl-nodes: set a location on false/true/one/EOS nodes. Fix #1345Tristan Gingold2020-05-292-2/+11
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* psl: set locations in CSE. Fix #1272Tristan Gingold2020-04-292-14/+4
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* psl: keep locations.Tristan Gingold2020-04-266-16/+46
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* psl-rewrites: handle N_Paren_Prop (simply discard).Tristan Gingold2020-03-131-0/+3
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* psl: keep denoting names in the PSL ast.Tristan Gingold2020-03-1311-21/+91
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* psl-nfa-utils: move active state in merge_state.Tristan Gingold2019-10-311-0/+5
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* psl: add active state.Tristan Gingold2019-10-214-20/+71
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* psl-nfas-utils: reuse True_Node.Tristan Gingold2019-10-211-4/+2
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* vhdl: Add the implicit [*] at start of PSL cover sequence.Tristan Gingold2019-10-152-0/+30
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* fix: move src/xtools to python/xtools (#846)1138-4EB2019-06-171-1/+1
| | | | | | * fix: move src/xtools to python/xtools * fix Makefiles affected by xtools and pnodes being moved
* vhdl-prints: handle PSL, add psl tokens for strong and inclusive variants.Tristan Gingold2019-05-301-0/+2
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* vhdl: renames disp_vhdl to printsTristan Gingold2019-05-302-0/+2
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* vhdl-disp_vhdl: fixes for psl.Tristan Gingold2019-05-251-2/+16
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* psl: can keep parenthesis during parse.Tristan Gingold2019-05-245-32/+74
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* errorout: add messages group instead of continuation.Tristan Gingold2019-05-121-1/+1
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* vhdl: decouple errorouts a bit more.Tristan Gingold2019-05-102-1/+14
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* psl: add psl-types, psl-nodes_priv.Tristan Gingold2019-05-1015-3/+72
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* Extract psl-errors from errorout.Tristan Gingold2019-05-102-0/+64
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* psl-rewrites: handle and/or seq.Tristan Gingold2018-11-301-1/+3
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* psl: adjust after pnodes.py changes and regenerate.Tristan Gingold2017-10-282-12/+12
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* PSL: add clocked SERE, make endpoints visible from VHDL.Tristan Gingold2016-03-226-20/+48
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