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author | Tristan Gingold <tgingold@free.fr> | 2020-06-30 18:42:53 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-06-30 19:34:50 +0200 |
commit | 1cc80ba8063de7083de78fc0473a1e5d6999a111 (patch) | |
tree | d0d4248123dda129a4624e50f86fbc8cad613906 /src/psl | |
parent | aedbcc715e099335d28e1e06934e75263bd335e9 (diff) | |
download | ghdl-1cc80ba8063de7083de78fc0473a1e5d6999a111.tar.gz ghdl-1cc80ba8063de7083de78fc0473a1e5d6999a111.tar.bz2 ghdl-1cc80ba8063de7083de78fc0473a1e5d6999a111.zip |
vhdl-sem_psl: avoid a crash in synth on incorrect clock.
Diffstat (limited to 'src/psl')
-rw-r--r-- | src/psl/psl-rewrites.ads | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/psl/psl-rewrites.ads b/src/psl/psl-rewrites.ads index ac76b7805..bb1eb58bc 100644 --- a/src/psl/psl-rewrites.ads +++ b/src/psl/psl-rewrites.ads @@ -1,6 +1,7 @@ with PSL.Nodes; use PSL.Nodes; package PSL.Rewrites is + function Rewrite_Boolean (N : Node) return Node; function Rewrite_SERE (N : Node) return Node; function Rewrite_Property (N : Node) return Node; procedure Rewrite_Unit (N : Node); |