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ghdldrv
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ghdlsimul.adb
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Author
Age
Files
Lines
*
synth: simplify elab-vhdl_annotations
Tristan Gingold
2022-09-19
1
-3
/
+0
*
synth: rename vhdl.annotations to elab.vhdl_annotations
Tristan Gingold
2022-09-19
1
-2
/
+3
*
synth: factorize code (reuse synth_constant_declaration)
Tristan Gingold
2022-09-17
1
-0
/
+2
*
simul: improve error handling during elaboration
Tristan Gingold
2022-09-16
1
-5
/
+5
*
simul: handle --expect-failure for elaboration
Tristan Gingold
2022-09-14
1
-9
/
+12
*
simul: rework assertions execution and error handling
Tristan Gingold
2022-08-21
1
-5
/
+0
*
ghdlsimul: add an option to debug before elaboration
Tristan Gingold
2022-08-18
1
-0
/
+2
*
ghdlsimul: simplify elaboration circuitery
Tristan Gingold
2022-07-20
1
-13
/
+0
*
elab-debugger: remove duplicate flag
Tristan Gingold
2022-06-03
1
-1
/
+3
*
ghdlsimul: use assertion level from command line
Tristan Gingold
2022-05-29
1
-0
/
+2
*
ghdlsimul: initial stop is after elaboration
Tristan Gingold
2022-05-27
1
-8
/
+1
*
vhdl-canon: add Canon_Add_Suspend_State
Tristan Gingold
2022-05-26
1
-0
/
+1
*
ghdlcomp(common_compile_elab): add allow_undef_generic parameter
Tristan Gingold
2022-05-16
1
-1
/
+1
*
ghdlsimul: add and improve debugger
Tristan Gingold
2022-05-14
1
-1
/
+10
*
ghdlsimul: add option -t to trace statements
Tristan Gingold
2022-05-12
1
-0
/
+2
*
ghdlsimul: now based on synth elab
Tristan Gingold
2022-05-11
1
-94
/
+118
*
update license headers
umarcor
2021-01-14
1
-11
/
+9
*
ghdlsimul: fix warning.
Tristan Gingold
2019-06-30
1
-1
/
+1
*
vhdl: move annotations from simul to vhdl.
Tristan Gingold
2019-06-29
1
-3
/
+3
*
ghdldrv: refactoring - share more code, isolate ghdlsynth from ghdlsimul.
Tristan Gingold
2019-06-29
1
-57
/
+3
*
Add simple_IO - to be used instead of Text_IO.
Tristan Gingold
2019-05-19
1
-5
/
+3
*
vhdl: move iirs_utils to vhdl.utils
Tristan Gingold
2019-05-06
1
-2
/
+2
*
vhdl: move std_standard package to vhdl child.
Tristan Gingold
2019-05-05
1
-3
/
+3
*
vhdl: move configuration package as a vhdl child.
Tristan Gingold
2019-05-05
1
-4
/
+4
*
vhdl: move canon to a vhdl child package.
Tristan Gingold
2019-05-05
1
-5
/
+5
*
simul: fix handling of time resolution.
Tristan Gingold
2019-01-06
1
-2
/
+3
*
ghdl_simul: adjust after ghdlcomp change.
Tristan Gingold
2018-08-10
1
-5
/
+13
*
Create the simul.ads package (for a namespace).
Tristan Gingold
2017-11-24
1
-17
/
+17
*
Annotations: minor reformating.
Tristan Gingold
2017-11-19
1
-2
/
+0
*
ghdl_simul: fix crash on option warning.
Tristan Gingold
2017-11-18
1
-0
/
+2
*
Add ghdlsynth in ghdl_simul
Tristan Gingold
2017-01-31
1
-1
/
+5
*
simulation: remove sim_be after previous code factorization.
Tristan Gingold
2016-10-15
1
-6
/
+6
*
ghdldrv: add functionnal API to compile.
Tristan Gingold
2016-05-07
1
-4
/
+12
*
Refactoring in simulate in order to link with ortho.
Tristan Gingold
2016-02-20
1
-5
/
+6
*
simul: return the exit status set by std.env
Tristan Gingold
2016-02-14
1
-0
/
+2
*
simul: exit with the right status for --has-feature.
Tristan Gingold
2016-02-09
1
-2
/
+11
*
simul: fix various issues.
Tristan Gingold
2016-01-24
1
-1
/
+1
*
Fix ghdl_simul build.
Tristan Gingold
2015-11-30
1
-2
/
+2
*
ghdlsimul: adjust after use of name for block_specification.
Tristan Gingold
2015-01-17
1
-2
/
+2
*
Move files and dirs from translate/
Tristan Gingold
2014-11-05
1
-0
/
+209