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* ghdlsimul: extract simul-main from simul-vhdl_simulTristan Gingold2023-01-311-2/+4
* synth: add partial support of foreign subprogramsTristan Gingold2023-01-201-0/+2
* ghdlsimul: check foreign subprogramsTristan Gingold2023-01-161-3/+4
* ghdlsimul: handle automatic time resolutionTristan Gingold2023-01-121-12/+17
* simul: fix handling of drivers/sensitivity within processesTristan Gingold2023-01-121-0/+1
* simul: handle -gGEN=VAL options after the unitTristan Gingold2023-01-111-7/+41
* ghdlsimul: do late semantic checksTristan Gingold2023-01-041-1/+19
* simul: allow unassigned top genericsTristan Gingold2022-12-261-1/+1
* vhdl: fix some compiler warningsTristan Gingold2022-11-081-2/+2
* synth: rework error procedure, always pass the instanceTristan Gingold2022-09-251-0/+2
* synth: simplify elab-vhdl_annotationsTristan Gingold2022-09-191-3/+0
* synth: rename vhdl.annotations to elab.vhdl_annotationsTristan Gingold2022-09-191-2/+3
* synth: factorize code (reuse synth_constant_declaration)Tristan Gingold2022-09-171-0/+2
* simul: improve error handling during elaborationTristan Gingold2022-09-161-5/+5
* simul: handle --expect-failure for elaborationTristan Gingold2022-09-141-9/+12
* simul: rework assertions execution and error handlingTristan Gingold2022-08-211-5/+0
* ghdlsimul: add an option to debug before elaborationTristan Gingold2022-08-181-0/+2
* ghdlsimul: simplify elaboration circuiteryTristan Gingold2022-07-201-13/+0
* elab-debugger: remove duplicate flagTristan Gingold2022-06-031-1/+3
* ghdlsimul: use assertion level from command lineTristan Gingold2022-05-291-0/+2
* ghdlsimul: initial stop is after elaborationTristan Gingold2022-05-271-8/+1
* vhdl-canon: add Canon_Add_Suspend_StateTristan Gingold2022-05-261-0/+1
* ghdlcomp(common_compile_elab): add allow_undef_generic parameterTristan Gingold2022-05-161-1/+1
* ghdlsimul: add and improve debuggerTristan Gingold2022-05-141-1/+10
* ghdlsimul: add option -t to trace statementsTristan Gingold2022-05-121-0/+2
* ghdlsimul: now based on synth elabTristan Gingold2022-05-111-94/+118
* update license headersumarcor2021-01-141-11/+9
* ghdlsimul: fix warning.Tristan Gingold2019-06-301-1/+1
* vhdl: move annotations from simul to vhdl.Tristan Gingold2019-06-291-3/+3
* ghdldrv: refactoring - share more code, isolate ghdlsynth from ghdlsimul.Tristan Gingold2019-06-291-57/+3
* Add simple_IO - to be used instead of Text_IO.Tristan Gingold2019-05-191-5/+3
* vhdl: move iirs_utils to vhdl.utilsTristan Gingold2019-05-061-2/+2
* vhdl: move std_standard package to vhdl child.Tristan Gingold2019-05-051-3/+3
* vhdl: move configuration package as a vhdl child.Tristan Gingold2019-05-051-4/+4
* vhdl: move canon to a vhdl child package.Tristan Gingold2019-05-051-5/+5
* simul: fix handling of time resolution.Tristan Gingold2019-01-061-2/+3
* ghdl_simul: adjust after ghdlcomp change.Tristan Gingold2018-08-101-5/+13
* Create the simul.ads package (for a namespace).Tristan Gingold2017-11-241-17/+17
* Annotations: minor reformating.Tristan Gingold2017-11-191-2/+0
* ghdl_simul: fix crash on option warning.Tristan Gingold2017-11-181-0/+2
* Add ghdlsynth in ghdl_simulTristan Gingold2017-01-311-1/+5
* simulation: remove sim_be after previous code factorization.Tristan Gingold2016-10-151-6/+6
* ghdldrv: add functionnal API to compile.Tristan Gingold2016-05-071-4/+12
* Refactoring in simulate in order to link with ortho.Tristan Gingold2016-02-201-5/+6
* simul: return the exit status set by std.envTristan Gingold2016-02-141-0/+2
* simul: exit with the right status for --has-feature.Tristan Gingold2016-02-091-2/+11
* simul: fix various issues.Tristan Gingold2016-01-241-1/+1
* Fix ghdl_simul build.Tristan Gingold2015-11-301-2/+2
* ghdlsimul: adjust after use of name for block_specification.Tristan Gingold2015-01-171-2/+2
* Move files and dirs from translate/Tristan Gingold2014-11-051-0/+209
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