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Age
Files
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*
synth: add Debug_Backtrace debug procedure
Tristan Gingold
2023-01-15
2
-0
/
+19
*
vhdl: add a warning to detect use before elaboration
Tristan Gingold
2023-01-15
8
-5
/
+99
*
vhdl: add Get/Set_Elaboration_Flag
Tristan Gingold
2023-01-14
6
-303
/
+384
*
synth: more refactoring
Tristan Gingold
2023-01-14
5
-40
/
+40
*
synth: improve error propagation on slices
Tristan Gingold
2023-01-14
5
-9
/
+31
*
synth-vhdl_stmts: introduce synth_individual_formal
Tristan Gingold
2023-01-14
1
-18
/
+107
*
synth-vhdl_stmts: refactoring
Tristan Gingold
2023-01-14
1
-103
/
+131
*
elab-vhdl_types(synth_record_type_definition): create unbounded record
Tristan Gingold
2023-01-14
1
-3
/
+8
*
elab-vhdl_debug: add option /t to print result type
Tristan Gingold
2023-01-14
1
-5
/
+6
*
synth-vhdl_eval: remove useless type unsharing for concat
Tristan Gingold
2023-01-14
1
-12
/
+4
*
Makefile.in: add dll_deps recipes to copy dll dependencies to prefix
Tristan Gingold
2023-01-14
1
-0
/
+10
*
Makefile.in: quote install destination
Tristan Gingold
2023-01-14
1
-33
/
+33
*
synth: handle protected functions in conversion functions
Tristan Gingold
2023-01-12
3
-8
/
+17
*
simul: handle PSL aborts
Tristan Gingold
2023-01-12
3
-0
/
+71
*
synth: improve handling of 2008 aggregates
Tristan Gingold
2023-01-12
1
-27
/
+142
*
elab-vhdl_values-debug: improve output for array unbounded
Tristan Gingold
2023-01-12
1
-14
/
+21
*
ghdlsimul: handle automatic time resolution
Tristan Gingold
2023-01-12
1
-12
/
+17
*
synth: handle generic mapped interface package
Tristan Gingold
2023-01-12
1
-5
/
+17
*
vhdl-sem_assocs(rewrite_non_object_association): set flag
Tristan Gingold
2023-01-12
1
-0
/
+1
*
vhdl: clear associated_type in Sem_Generic_Association_Chain
Tristan Gingold
2023-01-12
5
-9
/
+90
*
elab-vhdl_annotations(annotate_interface_list_subtype): adjust
Tristan Gingold
2023-01-12
1
-3
/
+15
*
testsuite/gna: add a test for #2303
Tristan Gingold
2023-01-12
2
-0
/
+19
*
simul: fix handling of drivers/sensitivity within processes
Tristan Gingold
2023-01-12
3
-21
/
+25
*
synth: fix handle of protected type bodies within instantiated packages.
Tristan Gingold
2023-01-12
3
-3
/
+30
*
elab-vhdl_types: improve handling of record subtypes
Tristan Gingold
2023-01-12
2
-18
/
+27
*
ghdl_simul: add commands to use libghdl
Tristan Gingold
2023-01-12
1
-0
/
+2
*
synth: handle operator as conversion function
Tristan Gingold
2023-01-12
1
-1
/
+13
*
vhdl-sem_names: finish prefix of element attribute names
Tristan Gingold
2023-01-12
1
-22
/
+32
*
testsuite/gna: adjust harness for #1257
Tristan Gingold
2023-01-12
1
-2
/
+2
*
synth: report values in bound errors
Tristan Gingold
2023-01-12
2
-9
/
+40
*
testsuite/gna: adjust harness for #1125
Tristan Gingold
2023-01-12
1
-1
/
+1
*
synth: use same wording for direction mismatch as simulation
Tristan Gingold
2023-01-12
1
-1
/
+2
*
Dependency Graphs (#2308)
Patrick Lehmann
2023-01-12
34
-338
/
+698
*
testsuite/gna: add a test for #2307
Tristan Gingold
2023-01-11
2
-0
/
+21
*
synth-vhdl_eval: handle to_X01 for bit to std_ulogic.
Tristan Gingold
2023-01-11
3
-0
/
+39
*
synth: handle entity attributes
Tristan Gingold
2023-01-11
1
-2
/
+18
*
synth: handle universal r*i and i*r mul, physical mod.
Tristan Gingold
2023-01-11
1
-1
/
+9
*
synth: handle element attribute
Tristan Gingold
2023-01-11
4
-9
/
+39
*
synth: fix matching comparaison tables
Tristan Gingold
2023-01-11
1
-27
/
+27
*
synth: rework error handling in file operations
Tristan Gingold
2023-01-11
3
-43
/
+63
*
simul: avoid a crash after an error in a condition
Tristan Gingold
2023-01-11
1
-1
/
+6
*
synth: improve support of PSL endpoints
Tristan Gingold
2023-01-11
4
-4
/
+8
*
synth: avoid a crash on very large object types
Tristan Gingold
2023-01-11
1
-0
/
+3
*
synth: check float ranges in subtype conversion
Tristan Gingold
2023-01-11
3
-2
/
+25
*
simul: allow function calls in signal association by value
Tristan Gingold
2023-01-11
1
-0
/
+2
*
synth: add a check for v87 concatenations
Tristan Gingold
2023-01-11
1
-1
/
+6
*
synth: support constant declarations in protected types
Tristan Gingold
2023-01-11
1
-0
/
+1
*
vhdl-configuration: relax top-level unit restrictions
Tristan Gingold
2023-01-11
1
-4
/
+5
*
synth: handle file subtype
Tristan Gingold
2023-01-11
2
-1
/
+9
*
simul: improve support of psl in debugger
Tristan Gingold
2023-01-11
2
-4
/
+13
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