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* vhdl-nodes: add Inertial_Flag for association_element_by_expressionTristan Gingold2022-06-127-387/+452
* testsuite/synth: add tests for #2088Tristan Gingold2022-06-114-0/+117
* elab-vhdl_types(Synth_Array_Attribute): handle dimension parameterTristan Gingold2022-06-111-1/+3
* testsuite/synth: add a test for #2086Tristan Gingold2022-06-112-0/+35
* synth-environment(Merge_Dyn_Insert): disable transformation.Tristan Gingold2022-06-111-1/+3
* netlists-memories: handle negation for In_Conjunction. Fix #2086Tristan Gingold2022-06-111-8/+3
* synth-vhdl_eval: add support for more operationsTristan Gingold2022-06-111-1/+10
* vhdl: recognize ieee.math_real.sign, fix is_x recogn.Tristan Gingold2022-06-119-217/+251
* Merge pull request #2087 from Guiltybyte/support-non-glibctgingold2022-06-091-1/+1
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| * deleted pragma messagesGuiltybyte2022-06-091-2/+0
| * Only enable backtrace on linux if glibc is presentGuiltybyte2022-06-091-1/+3
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* testsuite/synth: add a test for #2085Tristan Gingold2022-06-092-0/+35
* elab-vhdl_types(Elab_Declaration_Type): rework to handle 'subtypeTristan Gingold2022-06-097-30/+64
* testsuite/synth: add a test for #2084Tristan Gingold2022-06-092-0/+23
* vhdl-annotations: avoid a crash with subtype attribute in array.Tristan Gingold2022-06-093-5/+16
* testsuite/synth: add a test for #2083Tristan Gingold2022-06-082-0/+39
* synth-vhdl_expr.adb: use base type for indexed names. Fix #2083Tristan Gingold2022-06-081-1/+2
* synth-vhdl_expr: add an hook for signal attributesTristan Gingold2022-06-082-0/+11
* Makefile.in: tentatively use shared-libgcc for ghdl_mcodeTristan Gingold2022-06-081-1/+1
* synth-vhdl_eval: handle more operationsTristan Gingold2022-06-071-8/+17
* vhdl-sem: adjust condition to set suspend_state on proceduresTristan Gingold2022-06-074-269/+291
* elab-vhdl_context: also handle generic subprogramsTristan Gingold2022-06-071-2/+6
* options.adb: add commandsTristan Gingold2022-06-071-2/+2
* pyGHDL: regenerateTristan Gingold2022-06-071-10/+11
* testsuite/synth: add a test for #2081Tristan Gingold2022-06-072-0/+25
* errorout: add nowrite warning. Fix #2081Tristan Gingold2022-06-075-8/+16
* testsuite/gna: add one test for #2076Tristan Gingold2022-06-062-0/+5
* vhdl-parse.adb: fix uninitialized variable, for #2076Tristan Gingold2022-06-061-0/+1
* testsuite/gna: add tests for #2076Tristan Gingold2022-06-063-0/+34
* vhdl-sem_names: avoid a crash on incorrect selected name. For #2076Tristan Gingold2022-06-061-1/+2
* vhdl-parse: avoid a crash with return identifier. Fox #2076Tristan Gingold2022-06-061-1/+7
* synth-vhdl_stmts: fix handling of instantiated subprogramsTristan Gingold2022-06-061-1/+3
* synth-vhdl_eval: handle more operationsTristan Gingold2022-06-061-1/+16
* synth-vhdl_stmts: handle alias in assignment expressionTristan Gingold2022-06-063-2/+24
* vhdl-ieee-math_real: recognize more operationsTristan Gingold2022-06-063-230/+285
* synth-vhdl_eval: recognize and handle to_stdulogicvectorTristan Gingold2022-06-064-224/+241
* synth-vhdl_eval: handle more operationsTristan Gingold2022-06-052-37/+112
* vhdl: recognize more predefined ieee functions and operatorsTristan Gingold2022-06-055-465/+593
* synth-vhdl_eval: handle more operations (sgn/uns reduce)Tristan Gingold2022-06-051-6/+16
* synth-vhdl-eval: handle more operationsTristan Gingold2022-06-054-31/+272
* vhdl-ieee-numeric: recognize vector/scalar operationsTristan Gingold2022-06-053-296/+368
* testsuite/synth: add a test for #2074Tristan Gingold2022-06-052-0/+25
* synth-vhdl_oper: handle more bit_vector operations. Fix #2074Tristan Gingold2022-06-051-8/+13
* elab-debugger: add where commandTristan Gingold2022-06-051-28/+49
* synth-vhdl_eval: handle rotations and shift for numeric_stdTristan Gingold2022-06-051-4/+40
* synth-vhdl_eval: handle to_x01, to_ux01, to_x01z and is_xTristan Gingold2022-06-052-19/+56
* vhdl-ieee-numeric: recognize is_x, to_x01, to_ux01 and to_x01zTristan Gingold2022-06-053-234/+284
* synth-vhdl_eval: handle more operationsTristan Gingold2022-06-053-2/+41
* synth-ieee-numeric_std: fix handling of X for negationTristan Gingold2022-06-051-18/+20
* synth-vhdl_eval: handle find_leftmost and find_rightmostTristan Gingold2022-06-053-0/+55
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