index
:
iCE40/ghdl
master
[no description]
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
Commit message (
Collapse
)
Author
Age
Files
Lines
*
testsuite/synth: add a test for previous commit.
Tristan Gingold
2019-10-08
7
-1
/
+97
|
*
synth-disp_vhdl: handle array/record of 1 element.
Tristan Gingold
2019-10-08
1
-3
/
+11
|
*
synth: handle subprograms in package body.
Tristan Gingold
2019-10-08
1
-0
/
+5
|
*
testsuite/synth: add another test.
Tristan Gingold
2019-10-08
3
-1
/
+90
|
*
testsuite/synth: add a test.
Tristan Gingold
2019-10-08
3
-0
/
+87
|
*
testsuite/synth: add testcase for #964
Tristan Gingold
2019-10-08
3
-0
/
+99
|
*
synth: infere_ff: handle pre-enable. Fix #964
Tristan Gingold
2019-10-08
1
-23
/
+63
|
*
synth: handle case statement on bit vectors.
Tristan Gingold
2019-10-07
1
-0
/
+23
|
*
testsuite/synth: add test for previous commit.
Tristan Gingold
2019-10-07
3
-0
/
+27
|
*
synth: handle package bodies.
Tristan Gingold
2019-10-07
9
-311
/
+374
|
*
synth-oper: handle to_bitvector, simplify.
Tristan Gingold
2019-10-07
1
-9
/
+18
|
*
vhdl: recognize to_bitvector.
Tristan Gingold
2019-10-07
4
-84
/
+79
|
*
ghdlsynth: setup error messages for netlists.
Tristan Gingold
2019-10-07
1
-0
/
+2
|
*
synth-disp_vhdl: handle enum of width 1 for
Tristan Gingold
2019-10-07
1
-2
/
+6
|
*
synth-oper: add support for more functions.
Tristan Gingold
2019-10-07
1
-1
/
+51
|
*
testsuite/synth: add pkg01
Tristan Gingold
2019-10-07
5
-0
/
+82
|
*
synth: preliminary support for user packages.
Tristan Gingold
2019-10-07
4
-84
/
+85
|
*
synth: allow unconnected port.
Tristan Gingold
2019-10-07
1
-5
/
+7
|
*
ghdlsynth: add --out=dump
Tristan Gingold
2019-10-07
1
-1
/
+7
|
*
synth: add support for concurrent procedure calls. Fix #969
Tristan Gingold
2019-10-07
2
-4
/
+9
|
*
testsuite/synth: add testcase for #972
Tristan Gingold
2019-10-07
2
-0
/
+29
|
*
testsuite/synth: add testcase for #960
Tristan Gingold
2019-10-06
5
-0
/
+133
|
*
synth: propagate assignments out of subprograms. Fix #960
Tristan Gingold
2019-10-06
3
-2
/
+43
|
*
netlists-dump: improve output for --out=raw
Tristan Gingold
2019-10-06
1
-4
/
+5
|
*
synth: revert patch on synth_subprogram_association.
Tristan Gingold
2019-10-06
3
-8
/
+4
|
*
testsuite/synth: add a test for previous commit.
Tristan Gingold
2019-10-06
5
-0
/
+89
|
*
synth: handle subtypes in components. Fix #970
Tristan Gingold
2019-10-06
4
-20
/
+61
|
*
ghdlsynth: fix crash when using libghdl.
Tristan Gingold
2019-10-06
3
-3
/
+5
|
*
synth: fix crash for port subtype in component.
Tristan Gingold
2019-10-06
1
-1
/
+1
|
*
synth: handle /= with non-matching length. For #968
Tristan Gingold
2019-10-06
1
-6
/
+10
|
*
netlists: remove get_parent for instance.
Tristan Gingold
2019-10-06
1
-2
/
+0
|
*
netlists: remove get_parent renaming for input.
Tristan Gingold
2019-10-06
5
-6
/
+5
|
*
netlists: remove renaming of Get_Parent for Net.
Tristan Gingold
2019-10-06
12
-33
/
+34
|
*
netlists: remove get_name renaming for modules.
Tristan Gingold
2019-10-06
4
-9
/
+8
|
*
netlists: Remove Get_Name renaming for instances.
Tristan Gingold
2019-10-06
5
-10
/
+9
|
*
synth: handle neg for integers.
Tristan Gingold
2019-10-06
1
-0
/
+13
|
*
synth: add error messages for latches.
Tristan Gingold
2019-10-06
6
-6
/
+198
|
*
netlists-dump: add prefix to numbers.
Tristan Gingold
2019-10-06
1
-8
/
+8
|
*
errorout: reserve eargs for synthesis.
Tristan Gingold
2019-10-06
2
-1
/
+21
|
*
Rework errors handling, to have a more generic framework.
Tristan Gingold
2019-10-06
5
-206
/
+239
|
*
synth: fix selected signal assignment (use basetype).
Tristan Gingold
2019-10-05
1
-1
/
+1
|
*
synth: add support for comp. equal of two numeric signed (#966)
T. Meissner
2019-10-05
1
-0
/
+4
|
*
testsuite/synth: add a test for block declarations.
Tristan Gingold
2019-10-05
5
-0
/
+141
|
*
synth: support block declarations.
Tristan Gingold
2019-10-05
1
-2
/
+16
|
*
testsuite/synth: add testcase for #965
Tristan Gingold
2019-10-05
2
-0
/
+22
|
*
synth: minimal support for blocks. Fix #965
Tristan Gingold
2019-10-05
2
-0
/
+19
|
*
netlists-disp_vhdl: handle lsl, rol, asr, nand, nor.
Tristan Gingold
2019-10-04
1
-0
/
+18
|
*
netlists-disp_vhdl: add qualification when needed for =
Tristan Gingold
2019-10-04
1
-5
/
+24
|
*
netlists-disp_vhdl: handle empty operand for concat2, add
Tristan Gingold
2019-10-04
1
-1
/
+30
|
*
netlists-disp_vhdl: handle id_neg
Tristan Gingold
2019-10-04
1
-0
/
+2
|
[next]