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-rw-r--r--testsuite/synth/oper01/snum01.vhdl19
-rw-r--r--testsuite/synth/oper01/snum02.vhdl23
-rw-r--r--testsuite/synth/oper01/snum03.vhdl19
-rw-r--r--testsuite/synth/oper01/snum04.vhdl20
-rw-r--r--testsuite/synth/oper01/snum05.vhdl25
-rw-r--r--testsuite/synth/oper01/tb_snum01.vhdl20
-rw-r--r--testsuite/synth/oper01/tb_snum02.vhdl20
-rw-r--r--testsuite/synth/oper01/tb_snum03.vhdl20
-rw-r--r--testsuite/synth/oper01/tb_snum04.vhdl20
-rw-r--r--testsuite/synth/oper01/tb_snum05.vhdl20
-rwxr-xr-xtestsuite/synth/oper01/testsuite.sh2
11 files changed, 207 insertions, 1 deletions
diff --git a/testsuite/synth/oper01/snum01.vhdl b/testsuite/synth/oper01/snum01.vhdl
new file mode 100644
index 000000000..b9dee13a4
--- /dev/null
+++ b/testsuite/synth/oper01/snum01.vhdl
@@ -0,0 +1,19 @@
+entity snum01 is
+ port (ok : out boolean);
+end snum01;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of snum01 is
+ -- add uns uns
+ constant a : unsigned (7 downto 0) := x"1e";
+ constant b : unsigned (3 downto 0) := x"2";
+ constant r1 : unsigned (7 downto 0) := a + b;
+ signal er1 : unsigned (7 downto 0);
+begin
+ er1 <= x"20";
+-- ok <= r1 = x"20";
+ ok <= r1 = er1;
+end behav;
diff --git a/testsuite/synth/oper01/snum02.vhdl b/testsuite/synth/oper01/snum02.vhdl
new file mode 100644
index 000000000..9b578531f
--- /dev/null
+++ b/testsuite/synth/oper01/snum02.vhdl
@@ -0,0 +1,23 @@
+entity snum02 is
+ port (ok : out boolean);
+end snum02;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of snum02 is
+ -- add sgn int
+ constant a1 : signed (7 downto 0) := x"1d";
+ constant b1 : integer := 3;
+ constant r1 : signed (7 downto 0) := a1 + b1;
+
+ constant a2 : signed (7 downto 0) := x"24";
+ constant b2 : integer := -4;
+ constant r2 : signed (7 downto 0) := a2 + b2;
+
+ signal er1 : signed (7 downto 0) := x"20";
+begin
+-- ok <= r1 = x"20";
+ ok <= r1 = er1 and r2 = er1;
+end behav;
diff --git a/testsuite/synth/oper01/snum03.vhdl b/testsuite/synth/oper01/snum03.vhdl
new file mode 100644
index 000000000..90a3e9741
--- /dev/null
+++ b/testsuite/synth/oper01/snum03.vhdl
@@ -0,0 +1,19 @@
+entity snum03 is
+ port (ok : out boolean);
+end snum03;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of snum03 is
+ -- add uns nat
+ constant a1 : unsigned (7 downto 0) := x"1d";
+ constant b1 : integer := 3;
+ constant r1 : unsigned (7 downto 0) := a1 + b1;
+
+ signal er1 : unsigned (7 downto 0) := x"20";
+begin
+-- ok <= r1 = x"20";
+ ok <= r1 = er1;
+end behav;
diff --git a/testsuite/synth/oper01/snum04.vhdl b/testsuite/synth/oper01/snum04.vhdl
new file mode 100644
index 000000000..1ddc30320
--- /dev/null
+++ b/testsuite/synth/oper01/snum04.vhdl
@@ -0,0 +1,20 @@
+entity snum04 is
+ port (ok : out boolean);
+end snum04;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of snum04 is
+ -- add uns nat
+ constant a1 : unsigned (7 downto 0) := x"1d";
+ constant b1 : unsigned (3 downto 0) := x"5";
+ constant r1 : unsigned (11 downto 0) := a1 * b1;
+
+ signal er1 : unsigned (11 downto 0) := x"091";
+
+begin
+-- ok <= r1 = x"20";
+ ok <= r1 = er1;
+end behav;
diff --git a/testsuite/synth/oper01/snum05.vhdl b/testsuite/synth/oper01/snum05.vhdl
new file mode 100644
index 000000000..565d9199f
--- /dev/null
+++ b/testsuite/synth/oper01/snum05.vhdl
@@ -0,0 +1,25 @@
+entity snum05 is
+ port (ok : out boolean);
+end snum05;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of snum05 is
+ -- add uns nat
+ constant a1 : signed (7 downto 0) := x"1d";
+ constant b1 : signed (3 downto 0) := x"5";
+ constant r1 : signed (11 downto 0) := a1 * b1;
+
+ signal er1 : signed (11 downto 0) := x"091";
+
+ constant a2 : signed (7 downto 0) := x"fe";
+ constant b2 : signed (3 downto 0) := x"f";
+ constant r2 : signed (11 downto 0) := a2 * b2;
+ signal er2 : signed (11 downto 0) := x"002";
+
+begin
+-- ok <= r1 = x"20";
+ ok <= r1 = er1 and r2 = er2;
+end behav;
diff --git a/testsuite/synth/oper01/tb_snum01.vhdl b/testsuite/synth/oper01/tb_snum01.vhdl
new file mode 100644
index 000000000..73d3255a1
--- /dev/null
+++ b/testsuite/synth/oper01/tb_snum01.vhdl
@@ -0,0 +1,20 @@
+entity tb_snum01 is
+end tb_snum01;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_snum01 is
+ signal r : boolean;
+begin
+ cmp01_1: entity work.snum01
+ port map (r);
+
+ process
+ begin
+ wait for 1 ns;
+ assert r severity failure;
+
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/synth/oper01/tb_snum02.vhdl b/testsuite/synth/oper01/tb_snum02.vhdl
new file mode 100644
index 000000000..e6b1f8c32
--- /dev/null
+++ b/testsuite/synth/oper01/tb_snum02.vhdl
@@ -0,0 +1,20 @@
+entity tb_snum02 is
+end tb_snum02;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_snum02 is
+ signal r : boolean;
+begin
+ cmp02_1: entity work.snum02
+ port map (r);
+
+ process
+ begin
+ wait for 1 ns;
+ assert r severity failure;
+
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/synth/oper01/tb_snum03.vhdl b/testsuite/synth/oper01/tb_snum03.vhdl
new file mode 100644
index 000000000..13b090d67
--- /dev/null
+++ b/testsuite/synth/oper01/tb_snum03.vhdl
@@ -0,0 +1,20 @@
+entity tb_snum03 is
+end tb_snum03;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_snum03 is
+ signal r : boolean;
+begin
+ cmp03_1: entity work.snum03
+ port map (r);
+
+ process
+ begin
+ wait for 1 ns;
+ assert r severity failure;
+
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/synth/oper01/tb_snum04.vhdl b/testsuite/synth/oper01/tb_snum04.vhdl
new file mode 100644
index 000000000..97bb89754
--- /dev/null
+++ b/testsuite/synth/oper01/tb_snum04.vhdl
@@ -0,0 +1,20 @@
+entity tb_snum04 is
+end tb_snum04;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_snum04 is
+ signal r : boolean;
+begin
+ cmp04_1: entity work.snum04
+ port map (r);
+
+ process
+ begin
+ wait for 1 ns;
+ assert r severity failure;
+
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/synth/oper01/tb_snum05.vhdl b/testsuite/synth/oper01/tb_snum05.vhdl
new file mode 100644
index 000000000..7eeb0fe74
--- /dev/null
+++ b/testsuite/synth/oper01/tb_snum05.vhdl
@@ -0,0 +1,20 @@
+entity tb_snum05 is
+end tb_snum05;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_snum05 is
+ signal r : boolean;
+begin
+ cmp05_1: entity work.snum05
+ port map (r);
+
+ process
+ begin
+ wait for 1 ns;
+ assert r severity failure;
+
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/synth/oper01/testsuite.sh b/testsuite/synth/oper01/testsuite.sh
index 3f524a47e..b6695ca28 100755
--- a/testsuite/synth/oper01/testsuite.sh
+++ b/testsuite/synth/oper01/testsuite.sh
@@ -2,7 +2,7 @@
. ../../testenv.sh
-for t in cmp01 cmp02 match01; do
+for t in snum01 snum02 snum03 snum04 snum05 cmp01 cmp02 match01; do
analyze $t.vhdl tb_$t.vhdl
elab_simulate tb_$t --ieee-asserts=disable-at-0
clean