2 files changed, 37 insertions, 0 deletions
diff --git a/testsuite/gna/issue375/cond_assign_proc.vhdl b/testsuite/gna/issue375/cond_assign_proc.vhdl
new file mode 100644
index 000000000..0ae81ed96
--- /dev/null
+++ b/testsuite/gna/issue375/cond_assign_proc.vhdl
@@ -0,0 +1,26 @@
+library ieee ; 
+use ieee.std_logic_1164.all ; 
+use std.textio.all ; 
+
+entity cond_assign_proc is
+end entity cond_assign_proc;
+
+architecture doit of cond_assign_proc is
+  signal Clk : std_logic := '0'  ; 
+  signal Y : std_logic ; 
+begin
+  Clk <= not Clk after 10 ns ; 
+  
+  process (all)
+  begin
+    Y <= '1' when Clk = '1' else '0' ;
+  end process ;
+    
+  process
+  begin
+    wait for 500 ns ; 
+    std.env.stop ;
+  end process ; 
+end architecture doit ; 
+
+
diff --git a/testsuite/gna/issue375/testsuite.sh b/testsuite/gna/issue375/testsuite.sh
new file mode 100755
index 000000000..15eef134f
--- /dev/null
+++ b/testsuite/gna/issue375/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze cond_assign_proc.vhdl
+elab_simulate cond_assign_proc
+
+clean
+
+echo "Test successful"