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Diffstat (limited to 'testsuite/vests/vhdl-93/ashenden/compliant/ch_04_fg_04_04.vhd')
-rw-r--r-- | testsuite/vests/vhdl-93/ashenden/compliant/ch_04_fg_04_04.vhd | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-93/ashenden/compliant/ch_04_fg_04_04.vhd b/testsuite/vests/vhdl-93/ashenden/compliant/ch_04_fg_04_04.vhd new file mode 100644 index 000000000..6be89a349 --- /dev/null +++ b/testsuite/vests/vhdl-93/ashenden/compliant/ch_04_fg_04_04.vhd @@ -0,0 +1,46 @@ + +-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc + +-- This file is part of VESTs (Vhdl tESTs). + +-- VESTs is free software; you can redistribute it and/or modify it +-- under the terms of the GNU General Public License as published by the +-- Free Software Foundation; either version 2 of the License, or (at +-- your option) any later version. + +-- VESTs is distributed in the hope that it will be useful, but WITHOUT +-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for more details. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +-- --------------------------------------------------------------------- +-- +-- $Id: ch_04_fg_04_04.vhd,v 1.2 2001-10-26 16:29:33 paw Exp $ +-- $Revision: 1.2 $ +-- +-- --------------------------------------------------------------------- + +entity and_multiple is + port ( i : in bit_vector; y : out bit ); +end entity and_multiple; + +-------------------------------------------------- + +architecture behavioral of and_multiple is +begin + + and_reducer : process ( i ) is + variable result : bit; + begin + result := '1'; + for index in i'range loop + result := result and i(index); + end loop; + y <= result; + end process and_reducer; + +end architecture behavioral; |