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Diffstat (limited to 'testsuite/synth/psl02/verif1.vhdl')
| -rw-r--r-- | testsuite/synth/psl02/verif1.vhdl | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/testsuite/synth/psl02/verif1.vhdl b/testsuite/synth/psl02/verif1.vhdl new file mode 100644 index 000000000..5aeb9559f --- /dev/null +++ b/testsuite/synth/psl02/verif1.vhdl @@ -0,0 +1,5 @@ +vunit verif1 (assert2) +{ + default clock is rising_edge(clk); + assert always cnt /= 5 abort rst; +} |