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Diffstat (limited to 'testsuite/synth/mem02/ram4.vhdl')
| -rw-r--r-- | testsuite/synth/mem02/ram4.vhdl | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/testsuite/synth/mem02/ram4.vhdl b/testsuite/synth/mem02/ram4.vhdl index c397e44f1..c96208f7b 100644 --- a/testsuite/synth/mem02/ram4.vhdl +++ b/testsuite/synth/mem02/ram4.vhdl @@ -22,6 +22,7 @@ begin begin if rising_edge (clk) then if rst = '1' then + -- As MEM is written in a whole, this is not a RAM. mem <= init; end if; rdat <= mem((idx.idx+1) * 2 - 1 downto idx.idx * 2); |