aboutsummaryrefslogtreecommitdiffstats
path: root/testsuite/synth/issue1090/tb_simple_ram.vhdl
diff options
context:
space:
mode:
Diffstat (limited to 'testsuite/synth/issue1090/tb_simple_ram.vhdl')
-rw-r--r--testsuite/synth/issue1090/tb_simple_ram.vhdl4
1 files changed, 2 insertions, 2 deletions
diff --git a/testsuite/synth/issue1090/tb_simple_ram.vhdl b/testsuite/synth/issue1090/tb_simple_ram.vhdl
index 437c6543a..e5f515c21 100644
--- a/testsuite/synth/issue1090/tb_simple_ram.vhdl
+++ b/testsuite/synth/issue1090/tb_simple_ram.vhdl
@@ -15,8 +15,8 @@ architecture behav of tb_simple_ram is
begin
dut: entity work.simple_ram
port map (clk => clk,
- en => en, raddr => raddr, do => rdat,
- we => we, waddr => waddr, di => wdat);
+ en => en, raddr => raddr, dout => rdat,
+ we => we, waddr => waddr, din => wdat);
process
procedure pulse is