diff options
Diffstat (limited to 'testsuite/pyunit/Current.vhdl')
-rw-r--r-- | testsuite/pyunit/Current.vhdl | 42 |
1 files changed, 40 insertions, 2 deletions
diff --git a/testsuite/pyunit/Current.vhdl b/testsuite/pyunit/Current.vhdl index ff03e1d04..a017b9f46 100644 --- a/testsuite/pyunit/Current.vhdl +++ b/testsuite/pyunit/Current.vhdl @@ -21,7 +21,8 @@ end entity entity_1; architecture behav of entity_1 is constant MAX : positive := -25; signal rst : std_logic := foo('U'); --- signal vec : bit_vector(pack.input'bar'range); + signal vec : bit_vector(pack(3 to 2).signaal'range'value); + signal copy : input'subtype; type newInt is range -4 to 3; type newFp is range 4.3 downto -3.9; @@ -34,9 +35,10 @@ architecture behav of entity_1 is end record; type enum is (e1, e2, e3); type acc is access bar; + type fil is file of string; subtype uint8 is integer range 0 to 255; --- file f : text; + file f : text; function func (a : integer; b : boolean) return bit is begin @@ -50,6 +52,27 @@ architecture behav of entity_1 is end procedure; + type prot is protected + function meth(a : int) return bit; + end protected; + + type prot is protected body + variable var : positive; + constant const : boolean; + + function meth(a : int) return bit is + begin + + end function; + end protected body; + + package pack_inst is new generic_pack + generic map ( + BITS => 32 + ); + + attribute att : boolean; + alias bar is boolean; begin process(Clock) @@ -65,7 +88,14 @@ begin end architecture behav; package package_1 is + generic ( + BITS : positive + ); + + use lib.pack.all; + constant ghdl : float := (3, 5, 0 to 2 => 5, 3 => 4, name => 10); -- 2.3; + attribute fixed of ghdl : constant is true; component comp is port ( @@ -76,4 +106,12 @@ end package; package body package_1 is constant ghdl : float := (1); -- => 2, 4 => 5, others => 10); -- .5; + + type CAPACITY is range 0 to 1E5 units + pF; + nF = 1000 pF; + uF = 1000 nF; + mF = 1000 uF; + F = 1000 mF; + end units; end package body; |