6 files changed, 202 insertions, 0 deletions
diff --git a/testsuite/gna/issue382/Makefile b/testsuite/gna/issue382/Makefile
new file mode 100644
index 000000000..8e2597dd1
--- /dev/null
+++ b/testsuite/gna/issue382/Makefile
@@ -0,0 +1,24 @@
+ANALYSE=ghdl -a
+ELABORATE=ghdl -e
+VPATH=.
+
+OBJECTS= demo.o tb_demo.o
+
+all: tb_demo
+
+sim:
+	./tb_demo --stop-time=15sec --wave=tb_demo.ghw
+gsim:
+	killall gtkwave; true
+	./tb_demo --stop-time=300sec --wave=tb_demo.ghw
+	gtkwave tb_demo.ghw tb_demo.gtk
+                        
+tb_demo: $(OBJECTS)
+	$(ELABORATE) $@
+
+%.o:  %.vhd
+	$(ANALYSE) $<
+
+clean:
+	$(RM) *.o tb_demo e~tb_demoe.lst *~ work-obj93.cf
+
diff --git a/testsuite/gna/issue382/demo.vhd b/testsuite/gna/issue382/demo.vhd
new file mode 100644
index 000000000..b52712777
--- /dev/null
+++ b/testsuite/gna/issue382/demo.vhd
@@ -0,0 +1,44 @@
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+
+entity demo is
+        port (
+                clk,reset: in std_logic;
+                load:   in std_logic;
+                load_val: in unsigned(7 downto 0);
+                qout: out unsigned(7 downto 0);
+                is5: out std_logic
+                );
+end entity;
+
+architecture v1 of demo is
+        signal q: unsigned(7 downto 0); 
+begin
+        qout<=q;
+
+--        is5<='1' when q=x"05" else '0';
+        
+        process(clk, reset)
+        begin
+                if reset='1' then
+                        q<=(others=>'0');
+                        is5<='0';
+                elsif rising_edge(clk) then
+                        is5<='0';
+                        
+                        if q=x"04" then
+                                is5<='1';
+                        end if;
+
+                        if load='1' then
+                                q<=load_val;
+                                if load_val=x"05" then
+                                        is5<='1';
+                                end if;
+                        else
+                                q<=q+1;
+                        end if;
+                end if;
+        end process;
+end v1;
diff --git a/testsuite/gna/issue382/ghdl_howto.txt b/testsuite/gna/issue382/ghdl_howto.txt
new file mode 100644
index 000000000..bdb39ecdf
--- /dev/null
+++ b/testsuite/gna/issue382/ghdl_howto.txt
@@ -0,0 +1,55 @@
+Kurzanleitung für ghdl/gtkwave
+
+------------------------------------------------------------------------
+INSTALLATION
+
+== Linux ==
+
+Falls nicht in der Distri verfügbar:
+
+Für 80386 (32Bit)
+http://ghdl.free.fr/ghdl-0.26-i686-pc-linux.tar runterladen, auspacken und
+dem INSTALL folgen.
+
+Für 64Bit oder andere Architekturen muss man selber kompileren. Dazu ist
+gnat (GNU Ada) notwendig, ist etwas aufwendiger...
+
+Source zu GTKwave runterladen:
+
+http://home.nc.rr.com/gtkwave/gtkwave-current.tar.gz
+
+Es müssen die Developmentpakete zu gtk oder gtk2 und flex installiert sein!
+Dann den Installationsanweisungen in INSTALL.TXT folgen...
+
+== Windows ==
+
+Die Cygwin-Umgebung muss installiert sein (wg. gcc/make).
+
+http://ghdl.free.fr/ghdl-installer-0.25.exe
+
+http://www.dspia.com/gtkwave.html
+
+------------------------------------------------------------------------
+
+Ausführen der kleinen VHDL-Demo
+
+Folgende Files sind enthalten:
+
+- Makefile
+- tb_demo.vhd (Code für Testbench, Erzeugung von Stimuli)
+- demo.vhd (Code zum Testen, macht ein paar logische Operationen)
+- tb_demo.gtk (fertiges Setup zum Anzeigen der wichtigen Signale)
+
+Mit "make gsim" wird demo.vhd und tb_demo.vhd analysiert (=kompiliert),
+elaboriert (gelinked) und ein ausführbares Programm (tb_demo) erzeugt. 
+Das wird mit einer Zeitbegrenzung (300s) und der Datei zur Ausgabe der
+Signale (tb_demo.ghw) gestartet. Nach Simulationsende wird gtkwave zur
+Anzeige der Signalformen gestartet.
+
+Noch ein Hinweis:
+
+Eigene/neue Signale kann man in gtkwave mit dem Signal Search Tree (SST) in
+der Baustein-Hierarchie suchen und zur Anzeige hinzufügen. Mit "Write Save
+File" kann diese Einstellung in tb_demo.gtk abgespeichert werden.
+
+------------------------------------------------------------------------
diff --git a/testsuite/gna/issue382/tb_demo.gtk b/testsuite/gna/issue382/tb_demo.gtk
new file mode 100644
index 000000000..17931102e
--- /dev/null
+++ b/testsuite/gna/issue382/tb_demo.gtk
@@ -0,0 +1,13 @@
+[size] 1000 600
+[pos] -1 -1
+*-51.000000 2510000000000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+[treeopen] top.
+[treeopen] top.tb_demo.
+@28
+top.tb_demo.clk
+top.tb_demo.reset
+top.tb_demo.load
+top.tb_demo.is5
+@22
+#qout[7:0] top.tb_demo.qout[7] top.tb_demo.qout[6] top.tb_demo.qout[5] top.tb_demo.qout[4] top.tb_demo.qout[3] top.tb_demo.qout[2] top.tb_demo.qout[1] top.tb_demo.qout[0]
+#load_val[7:0] top.tb_demo.load_val[7] top.tb_demo.load_val[6] top.tb_demo.load_val[5] top.tb_demo.load_val[4] top.tb_demo.load_val[3] top.tb_demo.load_val[2] top.tb_demo.load_val[1] top.tb_demo.load_val[0]
diff --git a/testsuite/gna/issue382/tb_demo.vhd b/testsuite/gna/issue382/tb_demo.vhd
new file mode 100644
index 000000000..4ff04a4b0
--- /dev/null
+++ b/testsuite/gna/issue382/tb_demo.vhd
@@ -0,0 +1,54 @@
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+
+entity tb_demo is
+end entity;
+
+architecture v1 of tb_demo is
+        signal clk,reset: std_logic;
+
+        component demo is
+               port (
+                clk,reset: in std_logic;
+                load:   in std_logic;
+                load_val: in unsigned(7 downto 0);
+                qout: out unsigned(7 downto 0);
+                is5: out std_logic
+                );                         
+       end component;
+
+        signal load, is5: std_logic;
+        signal load_val,qout: unsigned(7 downto 0);
+begin
+
+UUT1: demo port map (clk, reset, load, load_val, qout, is5);
+
+        process
+        begin
+                load<='0';
+                for i in 0 to 3 loop
+                        wait until clk='1';
+                end loop;
+
+                load<='1';
+                load_val<=x"42";
+                wait until clk='1';
+        end process;
+
+        process
+        begin
+                reset<='1';
+                clk<='0';
+                wait for 2 sec;
+                reset<='0';
+                while 1=1 loop
+                        clk<='0';
+                        wait for 0.5 sec;
+                        clk<='1';
+                        wait for 0.5 sec;
+                end loop;
+        end process;
+
+
+end v1;
diff --git a/testsuite/gna/issue382/testsuite.sh b/testsuite/gna/issue382/testsuite.sh
new file mode 100755
index 000000000..82a7ad77f
--- /dev/null
+++ b/testsuite/gna/issue382/testsuite.sh
@@ -0,0 +1,12 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+analyze demo.vhd
+analyze tb_demo.vhd
+# elab_simulate tb_demo --stop-time=300sec --wave=tb_demo.ghw
+elab_simulate tb_demo
+
+clean
+
+echo "Test successful"