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-rw-r--r--testsuite/gna/issue201/repro.vhdl14
-rwxr-xr-xtestsuite/gna/issue201/testsuite.sh11
2 files changed, 25 insertions, 0 deletions
diff --git a/testsuite/gna/issue201/repro.vhdl b/testsuite/gna/issue201/repro.vhdl
new file mode 100644
index 000000000..3f3ce9ac4
--- /dev/null
+++ b/testsuite/gna/issue201/repro.vhdl
@@ -0,0 +1,14 @@
+package gen is
+ generic (type t);
+end gen;
+
+entity e is
+end entity;
+
+architecture a of e is
+ subtype T_DATA is bit_vector(31 downto 0);
+ type T_DATA_VECTOR is array(natural range <>) of T_DATA;
+
+ package pkg is new work.gen generic map (t => t_data_vector (31 downto 0));
+begin
+end architecture;
diff --git a/testsuite/gna/issue201/testsuite.sh b/testsuite/gna/issue201/testsuite.sh
new file mode 100755
index 000000000..f4a473727
--- /dev/null
+++ b/testsuite/gna/issue201/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze repro.vhdl
+elab_simulate e
+
+clean
+
+echo "Test successful"