diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/ghdldrv/ghdlsynth.adb | 2 | ||||
| -rw-r--r-- | src/synth/synth-insts.adb | 15 | ||||
| -rw-r--r-- | src/synth/synth-stmts.adb | 21 | ||||
| -rw-r--r-- | src/synth/synth-stmts.ads | 3 | ||||
| -rw-r--r-- | src/vhdl/vhdl-annotations.adb | 30 | ||||
| -rw-r--r-- | src/vhdl/vhdl-canon.adb | 88 | ||||
| -rw-r--r-- | src/vhdl/vhdl-configuration.adb | 71 | ||||
| -rw-r--r-- | src/vhdl/vhdl-configuration.ads | 3 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.adb | 18 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 14 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes_meta.adb | 428 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes_meta.ads | 2 | ||||
| -rw-r--r-- | src/vhdl/vhdl-parse.adb | 1 | 
13 files changed, 450 insertions, 246 deletions
| diff --git a/src/ghdldrv/ghdlsynth.adb b/src/ghdldrv/ghdlsynth.adb index 3fd19c2b8..b5629d1e7 100644 --- a/src/ghdldrv/ghdlsynth.adb +++ b/src/ghdldrv/ghdlsynth.adb @@ -172,6 +172,8 @@ package body Ghdlsynth is           return Null_Iir;        end if; +      Vhdl.Configuration.Add_Verification_Units; +        --  Check (and possibly abandon) if entity can be at the top of the        --  hierarchy.        declare diff --git a/src/synth/synth-insts.adb b/src/synth/synth-insts.adb index a2268394e..eb40a023e 100644 --- a/src/synth/synth-insts.adb +++ b/src/synth/synth-insts.adb @@ -736,6 +736,18 @@ package body Synth.Insts is        end loop;     end Apply_Block_Configuration; +   procedure Synth_Verification_Units +     (Syn_Inst : Synth_Instance_Acc; Parent : Node) +   is +      Unit : Node; +   begin +      Unit := Get_Bound_Vunit_Chain (Parent); +      while Unit /= Null_Node loop +         Synth_Verification_Unit (Syn_Inst, Unit); +         Unit := Get_Bound_Vunit_Chain (Unit); +      end loop; +   end Synth_Verification_Units; +     procedure Synth_Instance (Inst : Inst_Object)     is        Entity : constant Node := Inst.Decl; @@ -784,6 +796,9 @@ package body Synth.Insts is        Synth_Concurrent_Statements          (Syn_Inst, Get_Concurrent_Statement_Chain (Arch)); +      Synth_Verification_Units (Syn_Inst, Entity); +      Synth_Verification_Units (Syn_Inst, Arch); +        Finalize_Assignments (Build_Context);        --  Remove unused gates.  This is not only an optimization but also diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb index 2eb6b453c..3f31dddb1 100644 --- a/src/synth/synth-stmts.adb +++ b/src/synth/synth-stmts.adb @@ -1618,10 +1618,8 @@ package body Synth.Stmts is              when Iir_Kind_Psl_Restrict_Directive =>                 Synth_Psl_Restrict_Directive (Syn_Inst, Stmt);              when Iir_Kind_Psl_Assume_Directive => -               --  Passive statement.                 Synth_Psl_Assume_Directive (Syn_Inst, Stmt);              when Iir_Kind_Psl_Assert_Directive => -               --  Passive statement.                 Synth_Psl_Assert_Directive (Syn_Inst, Stmt);              when Iir_Kind_Concurrent_Assertion_Statement =>                 --  Passive statement. @@ -1632,4 +1630,23 @@ package body Synth.Stmts is           Stmt := Get_Chain (Stmt);        end loop;     end Synth_Concurrent_Statements; + +   procedure Synth_Verification_Unit +     (Syn_Inst : Synth_Instance_Acc; Unit : Node) +   is +      Item : Node; +   begin +      Item := Get_Vunit_Item_Chain (Unit); +      while Item /= Null_Node loop +         case Get_Kind (Item) is +            when Iir_Kind_Psl_Default_Clock => +               null; +            when Iir_Kind_Psl_Assert_Directive => +               Synth_Psl_Assert_Directive (Syn_Inst, Item); +            when others => +               Error_Kind ("synth_verification_unit", Item); +         end case; +         Item := Get_Chain (Item); +      end loop; +   end Synth_Verification_Unit;  end Synth.Stmts; diff --git a/src/synth/synth-stmts.ads b/src/synth/synth-stmts.ads index 85f3eaa9f..cdd26e8eb 100644 --- a/src/synth/synth-stmts.ads +++ b/src/synth/synth-stmts.ads @@ -41,6 +41,9 @@ package Synth.Stmts is     procedure Synth_Concurrent_Statements       (Syn_Inst : Synth_Instance_Acc; Stmts : Node); +   procedure Synth_Verification_Unit +     (Syn_Inst : Synth_Instance_Acc; Unit : Node); +     --  For iterators.     function In_Range (Rng : Discrete_Range_Type; V : Int64) return Boolean;     procedure Update_Index (Rng : Discrete_Range_Type; Idx : in out Int64); diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 7e2d19a58..d3d959da6 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -1108,7 +1108,7 @@ package body Vhdl.Annotations is        end loop;     end Annotate_Concurrent_Statements_List; -   procedure Annotate_Entity (Decl: Iir_Entity_Declaration) +   procedure Annotate_Entity (Decl : Iir_Entity_Declaration)     is        Entity_Info: Sim_Info_Acc;     begin @@ -1148,6 +1148,32 @@ package body Vhdl.Annotations is        Set_Info (Decl, Arch_Info);     end Annotate_Architecture; +   procedure Annotate_Vunit_Declaration (Decl : Iir) +   is +      Vunit_Info : Sim_Info_Acc; +      Item : Iir; +   begin +      Vunit_Info := new Sim_Info_Type'(Kind => Kind_Block, +                                       Ref => Decl, +                                       Inst_Slot => Invalid_Instance_Slot, +                                       Nbr_Objects => 0, +                                       Nbr_Instances => 0); +      Set_Info (Decl, Vunit_Info); + +      Item := Get_Vunit_Item_Chain (Decl); +      while Item /= Null_Iir loop +         case Get_Kind (Item) is +            when Iir_Kind_Psl_Default_Clock => +               null; +            when Iir_Kind_Psl_Assert_Directive => +               null; +            when others => +               Error_Kind ("annotate_vunit_declaration", Item); +         end case; +         Item := Get_Chain (Item); +      end loop; +   end Annotate_Vunit_Declaration; +     procedure Annotate_Component_Configuration       (Conf : Iir_Component_Configuration)     is @@ -1259,6 +1285,8 @@ package body Vhdl.Annotations is              Annotate_Package_Declaration (Global_Info, El);           when Iir_Kind_Context_Declaration =>              null; +         when Iir_Kind_Vunit_Declaration => +            Annotate_Vunit_Declaration (El);           when others =>              Error_Kind ("annotate2", El);        end case; diff --git a/src/vhdl/vhdl-canon.adb b/src/vhdl/vhdl-canon.adb index 1ee405a1f..02818ad39 100644 --- a/src/vhdl/vhdl-canon.adb +++ b/src/vhdl/vhdl-canon.adb @@ -1765,6 +1765,25 @@ package body Vhdl.Canon is        Set_PSL_Clock_Sensitivity (Stmt, List);     end Canon_Psl_Clocked_NFA; +   procedure Canon_Psl_Property_Directive (Stmt : Iir) +   is +      Prop : PSL_Node; +      Fa : PSL_NFA; +   begin +      Prop := Get_Psl_Property (Stmt); +      Prop := PSL.Rewrites.Rewrite_Property (Prop); +      Set_Psl_Property (Stmt, Prop); + +      --  Generate the NFA. +      Fa := PSL.Build.Build_FA (Prop); +      Set_PSL_NFA (Stmt, Fa); + +      Canon_Psl_Clocked_NFA (Stmt); +      if Canon_Flag_Expressions then +         Canon_PSL_Expression (Get_PSL_Clock (Stmt)); +      end if; +   end Canon_Psl_Property_Directive; +     procedure Canon_Psl_Sequence_Directive (Stmt : Iir)     is        Seq : PSL_Node; @@ -1784,16 +1803,21 @@ package body Vhdl.Canon is        end if;     end Canon_Psl_Sequence_Directive; -   procedure Canon_Psl_Directive (Stmt : Iir) is +   procedure Canon_Psl_Assert_Directive (Stmt : Iir) is     begin -      Canon_Psl_Clocked_NFA (Stmt); +      Canon_Psl_Property_Directive (Stmt); +      if Canon_Flag_Expressions then +         Canon_Expression (Get_Report_Expression (Stmt)); +      end if; +   end Canon_Psl_Assert_Directive; +   procedure Canon_Psl_Cover_Directive (Stmt : Iir) is +   begin +      Canon_Psl_Sequence_Directive (Stmt);        if Canon_Flag_Expressions then -         Canon_PSL_Expression (Get_PSL_Clock (Stmt)); -         Canon_Expression (Get_Severity_Expression (Stmt));           Canon_Expression (Get_Report_Expression (Stmt));        end if; -   end Canon_Psl_Directive; +   end Canon_Psl_Cover_Directive;     procedure Canon_If_Case_Generate_Statement_Body       (Bod : Iir; Alt_Num : in out Natural; Top : Iir_Design_Unit) is @@ -2127,29 +2151,12 @@ package body Vhdl.Canon is                      (Top, Get_Generate_Statement_Body (El));                 end; -            when Iir_Kind_Psl_Assert_Directive -               | Iir_Kind_Psl_Assume_Directive=> -               declare -                  Prop : PSL_Node; -                  Fa : PSL_NFA; -               begin -                  Prop := Get_Psl_Property (El); -                  Prop := PSL.Rewrites.Rewrite_Property (Prop); -                  Set_Psl_Property (El, Prop); - -                  --  Generate the NFA. -                  Fa := PSL.Build.Build_FA (Prop); -                  Set_PSL_NFA (El, Fa); - -                  Canon_Psl_Directive (El); -               end; - +            when Iir_Kind_Psl_Assert_Directive => +               Canon_Psl_Assert_Directive (El); +            when Iir_Kind_Psl_Assume_Directive => +               Canon_Psl_Property_Directive (El);              when Iir_Kind_Psl_Cover_Directive => -               Canon_Psl_Sequence_Directive (El); -               if Canon_Flag_Expressions then -                  Canon_Expression (Get_Severity_Expression (El)); -                  Canon_Expression (Get_Report_Expression (El)); -               end if; +               Canon_Psl_Cover_Directive (El);              when Iir_Kind_Psl_Restrict_Directive =>                 Canon_Psl_Sequence_Directive (El); @@ -3221,6 +3228,24 @@ package body Vhdl.Canon is        end if;     end Canon_Interface_List; +   procedure Canon_Psl_Verification_Unit (Decl : Iir) +   is +      Item : Iir; +   begin +      Item := Get_Vunit_Item_Chain (Decl); +      while Item /= Null_Iir loop +         case Get_Kind (Item) is +            when Iir_Kind_Psl_Default_Clock => +               null; +            when Iir_Kind_Psl_Assert_Directive => +               Canon_Psl_Assert_Directive (Item); +            when others => +               Error_Kind ("canon_psl_verification_unit", Item); +         end case; +         Item := Get_Chain (Item); +      end loop; +   end Canon_Psl_Verification_Unit; +     procedure Canonicalize (Unit: Iir_Design_Unit)     is        El: Iir; @@ -3244,7 +3269,7 @@ package body Vhdl.Canon is        end if;        El := Get_Library_Unit (Unit); -      case Get_Kind (El) is +      case Iir_Kinds_Library_Unit (Get_Kind (El)) is           when Iir_Kind_Entity_Declaration =>              Canon_Interface_List (Get_Generic_Chain (El));              Canon_Interface_List (Get_Port_Chain (El)); @@ -3267,10 +3292,11 @@ package body Vhdl.Canon is              Set_Library_Unit (Unit, El);           when Iir_Kind_Context_Declaration =>              null; -         when Iir_Kinds_Verification_Unit => +         when Iir_Kind_Vunit_Declaration => +            Canon_Psl_Verification_Unit (El); +         when Iir_Kind_Vmode_Declaration +           | Iir_Kind_Vprop_Declaration =>              null; -         when others => -            Error_Kind ("canonicalize2", El);        end case;     end Canonicalize; diff --git a/src/vhdl/vhdl-configuration.adb b/src/vhdl/vhdl-configuration.adb index 34f1dfbe7..07a98400c 100644 --- a/src/vhdl/vhdl-configuration.adb +++ b/src/vhdl/vhdl-configuration.adb @@ -138,7 +138,7 @@ package body Vhdl.Configuration is        --  Lib_Unit may have changed.        Lib_Unit := Get_Library_Unit (Unit); -      case Get_Kind (Lib_Unit) is +      case Iir_Kinds_Library_Unit (Get_Kind (Lib_Unit)) is           when Iir_Kind_Package_Declaration =>              --  Analyze the package declaration, so that Set_Package below              --  will set the full package (and not a stub). @@ -171,14 +171,11 @@ package body Vhdl.Configuration is              --  find all entity/architecture/configuration instantiation              Add_Design_Unit (Get_Design_Unit (Get_Entity (Lib_Unit)), Unit);              Add_Design_Concurrent_Stmts (Lib_Unit); -         when Iir_Kind_Entity_Declaration => -            null; -         when Iir_Kind_Package_Body => +         when Iir_Kind_Entity_Declaration +           | Iir_Kind_Package_Body +           | Iir_Kind_Context_Declaration +           | Iir_Kinds_Verification_Unit =>              null; -         when Iir_Kind_Context_Declaration => -            null; -         when others => -            Error_Kind ("add_design_unit", Lib_Unit);        end case;        --  Add it in the table, after the dependencies. @@ -685,6 +682,64 @@ package body Vhdl.Configuration is        return Top;     end Configure; +   procedure Add_Verification_Unit (Vunit : Iir) +   is +      Hier_Name : constant Iir := Get_Hierarchical_Name (Vunit); +      Name : Iir; +   begin +      --  Not bound. +      if Hier_Name = Null_Iir then +         return; +      end if; + +      Name := Get_Architecture (Hier_Name); +      if Name /= Null_Node then +         Name := Get_Named_Entity (Name); +         pragma Assert (Get_Kind (Name) = Iir_Kind_Architecture_Body); +      else +         Name := Get_Entity_Name (Hier_Name); +         Name := Get_Named_Entity (Name); +         pragma Assert (Get_Kind (Name) = Iir_Kind_Entity_Declaration); +      end if; + +      if not Get_Configuration_Mark_Flag (Get_Design_Unit (Name)) then +         --  Not for a configured unit. +         return; +      end if; +      Set_Bound_Vunit_Chain (Vunit, Get_Bound_Vunit_Chain (Name)); +      Set_Bound_Vunit_Chain (Name, Vunit); +      Add_Design_Unit (Get_Design_Unit (Vunit), Vunit); +   end Add_Verification_Unit; + +   procedure Add_Verification_Units +   is +      Library : Iir; +      File : Iir; +      Unit : Iir; +      Lib : Iir; +   begin +      --  For each units: +      Library := Libraries.Get_Libraries_Chain; +      while Library /= Null_Iir loop +         File := Get_Design_File_Chain (Library); +         while File /= Null_Iir loop +            Unit := Get_First_Design_Unit (File); +            while Unit /= Null_Iir loop +               Lib := Get_Library_Unit (Unit); +               if Get_Kind (Lib) = Iir_Kind_Vunit_Declaration then +                  --  Load it. +                  Load_Design_Unit (Unit, Unit); + +                  Add_Verification_Unit (Get_Library_Unit (Unit)); +               end if; +               Unit := Get_Chain (Unit); +            end loop; +            File := Get_Chain (File); +         end loop; +         Library := Get_Chain (Library); +      end loop; +   end Add_Verification_Units; +     procedure Check_Entity_Declaration_Top       (Entity : Iir_Entity_Declaration; Enable_Override : Boolean)     is diff --git a/src/vhdl/vhdl-configuration.ads b/src/vhdl/vhdl-configuration.ads index 8cadad8fc..c9f1d1194 100644 --- a/src/vhdl/vhdl-configuration.ads +++ b/src/vhdl/vhdl-configuration.ads @@ -41,6 +41,9 @@ package Vhdl.Configuration is     --  Add design unit UNIT (with its dependences) in the design_units table.     procedure Add_Design_Unit (Unit : Iir_Design_Unit; From : Iir); +   --  Add all vunits that are bound to any configured entity architecture. +   procedure Add_Verification_Units; +     --  If set, all design units (even package bodies) are loaded.     Flag_Load_All_Design_Units : Boolean := True; diff --git a/src/vhdl/vhdl-nodes.adb b/src/vhdl/vhdl-nodes.adb index 19a65af85..223654976 100644 --- a/src/vhdl/vhdl-nodes.adb +++ b/src/vhdl/vhdl-nodes.adb @@ -1037,7 +1037,6 @@ package body Vhdl.Nodes is             | Iir_Kind_Context_Declaration             | Iir_Kind_Vmode_Declaration             | Iir_Kind_Vprop_Declaration -           | Iir_Kind_Vunit_Declaration             | Iir_Kind_Package_Body             | Iir_Kind_Type_Declaration             | Iir_Kind_Anonymous_Type_Declaration @@ -1217,6 +1216,7 @@ package body Vhdl.Nodes is             | Iir_Kind_Entity_Declaration             | Iir_Kind_Package_Declaration             | Iir_Kind_Package_Instantiation_Declaration +           | Iir_Kind_Vunit_Declaration             | Iir_Kind_Architecture_Body             | Iir_Kind_Package_Header             | Iir_Kind_Component_Declaration @@ -2668,6 +2668,22 @@ package body Vhdl.Nodes is        Set_Field5 (Vunit, Chain);     end Set_Vunit_Item_Chain; +   function Get_Bound_Vunit_Chain (Unit : Iir) return Iir is +   begin +      pragma Assert (Unit /= Null_Iir); +      pragma Assert (Has_Bound_Vunit_Chain (Get_Kind (Unit)), +                     "no field Bound_Vunit_Chain"); +      return Get_Field8 (Unit); +   end Get_Bound_Vunit_Chain; + +   procedure Set_Bound_Vunit_Chain (Unit : Iir; Vunit : Iir) is +   begin +      pragma Assert (Unit /= Null_Iir); +      pragma Assert (Has_Bound_Vunit_Chain (Get_Kind (Unit)), +                     "no field Bound_Vunit_Chain"); +      Set_Field8 (Unit, Vunit); +   end Set_Bound_Vunit_Chain; +     function Get_Block_Configuration (Target : Iir) return Iir is     begin        pragma Assert (Target /= Null_Iir); diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 79ad569fc..ac3f5979a 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -852,6 +852,8 @@ package Vhdl.Nodes is     --     --   Get/Set_Attribute_Value_Chain (Field4)     -- +   --   Get/Set_Bound_Vunit_Chain (Field8) +   --     --   Get/Set_Visible_Flag (Flag4)     --     --   Get/Set_Is_Within_Flag (Flag5) @@ -881,6 +883,8 @@ package Vhdl.Nodes is     --  The default configuration created by canon.  This is a design unit.     --   Get/Set_Default_Configuration_Declaration (Field6)     -- +   --   Get/Set_Bound_Vunit_Chain (Field8) +   --     --   Get/Set_Foreign_Flag (Flag3)     --     --   Get/Set_Visible_Flag (Flag4) @@ -1037,7 +1041,7 @@ package Vhdl.Nodes is     --     --   Get/Set_End_Has_Identifier (Flag9) -   -- Iir_Kind_Vunit_Declaration (Short) +   -- Iir_Kind_Vunit_Declaration (Medium)     -- Iir_Kind_Vmode_Declaration (Short)     -- Iir_Kind_Vprop_Declaration (Short)     -- @@ -1052,6 +1056,9 @@ package Vhdl.Nodes is     --     --   Get/Set_Vunit_Item_Chain (Field5)     -- +   -- Only for Iir_Kind_Vunit_Declaration: +   --   Get/Set_Bound_Vunit_Chain (Field8) +   --     --   Get/Set_Visible_Flag (Flag4)     --     --   Get/Set_Is_Within_Flag (Flag5) @@ -6555,6 +6562,11 @@ package Vhdl.Nodes is     function Get_Vunit_Item_Chain (Vunit : Iir) return Iir;     procedure Set_Vunit_Item_Chain (Vunit : Iir; Chain : Iir); +   --  Chain of vunit declarations bound to an entity or an architecture. +   --  Field: Field8 Chain +   function Get_Bound_Vunit_Chain (Unit : Iir) return Iir; +   procedure Set_Bound_Vunit_Chain (Unit : Iir; Vunit : Iir); +     --  Field: Field5     function Get_Block_Configuration (Target : Iir) return Iir;     procedure Set_Block_Configuration (Target : Iir; Block : Iir); diff --git a/src/vhdl/vhdl-nodes_meta.adb b/src/vhdl/vhdl-nodes_meta.adb index 91f1608d2..8d9cc4057 100644 --- a/src/vhdl/vhdl-nodes_meta.adb +++ b/src/vhdl/vhdl-nodes_meta.adb @@ -103,6 +103,7 @@ package body Vhdl.Nodes_Meta is        Field_Hierarchical_Name => Type_Iir,        Field_Inherit_Spec_Chain => Type_Iir,        Field_Vunit_Item_Chain => Type_Iir, +      Field_Bound_Vunit_Chain => Type_Iir,        Field_Block_Configuration => Type_Iir,        Field_Concurrent_Statement_Chain => Type_Iir,        Field_Chain => Type_Iir, @@ -526,6 +527,8 @@ package body Vhdl.Nodes_Meta is              return "inherit_spec_chain";           when Field_Vunit_Item_Chain =>              return "vunit_item_chain"; +         when Field_Bound_Vunit_Chain => +            return "bound_vunit_chain";           when Field_Block_Configuration =>              return "block_configuration";           when Field_Concurrent_Statement_Chain => @@ -1748,6 +1751,8 @@ package body Vhdl.Nodes_Meta is              return Attr_Chain;           when Field_Vunit_Item_Chain =>              return Attr_Chain; +         when Field_Bound_Vunit_Chain => +            return Attr_Chain;           when Field_Block_Configuration =>              return Attr_None;           when Field_Concurrent_Statement_Chain => @@ -2802,6 +2807,7 @@ package body Vhdl.Nodes_Meta is        Field_Declaration_Chain,        Field_Concurrent_Statement_Chain,        Field_Attribute_Value_Chain, +      Field_Bound_Vunit_Chain,        --  Iir_Kind_Configuration_Declaration        Field_Identifier,        Field_Visible_Flag, @@ -2883,6 +2889,7 @@ package body Vhdl.Nodes_Meta is        Field_Hierarchical_Name,        Field_Inherit_Spec_Chain,        Field_Vunit_Item_Chain, +      Field_Bound_Vunit_Chain,        --  Iir_Kind_Package_Body        Field_Identifier,        Field_End_Has_Reserved_Id, @@ -2905,6 +2912,7 @@ package body Vhdl.Nodes_Meta is        Field_Concurrent_Statement_Chain,        Field_Attribute_Value_Chain,        Field_Default_Configuration_Declaration, +      Field_Bound_Vunit_Chain,        --  Iir_Kind_Type_Declaration        Field_Identifier,        Field_Visible_Flag, @@ -4592,208 +4600,208 @@ package body Vhdl.Nodes_Meta is        Iir_Kind_Subtype_Definition => 466,        Iir_Kind_Scalar_Nature_Definition => 470,        Iir_Kind_Overload_List => 471, -      Iir_Kind_Entity_Declaration => 483, -      Iir_Kind_Configuration_Declaration => 492, -      Iir_Kind_Context_Declaration => 498, -      Iir_Kind_Package_Declaration => 513, -      Iir_Kind_Package_Instantiation_Declaration => 527, -      Iir_Kind_Vmode_Declaration => 537, -      Iir_Kind_Vprop_Declaration => 547, -      Iir_Kind_Vunit_Declaration => 557, -      Iir_Kind_Package_Body => 565, -      Iir_Kind_Architecture_Body => 577, -      Iir_Kind_Type_Declaration => 584, -      Iir_Kind_Anonymous_Type_Declaration => 590, -      Iir_Kind_Subtype_Declaration => 597, -      Iir_Kind_Nature_Declaration => 603, -      Iir_Kind_Subnature_Declaration => 609, -      Iir_Kind_Package_Header => 611, -      Iir_Kind_Unit_Declaration => 620, -      Iir_Kind_Library_Declaration => 627, -      Iir_Kind_Component_Declaration => 637, -      Iir_Kind_Attribute_Declaration => 644, -      Iir_Kind_Group_Template_Declaration => 650, -      Iir_Kind_Group_Declaration => 657, -      Iir_Kind_Element_Declaration => 664, -      Iir_Kind_Non_Object_Alias_Declaration => 672, -      Iir_Kind_Psl_Declaration => 680, -      Iir_Kind_Psl_Endpoint_Declaration => 694, -      Iir_Kind_Terminal_Declaration => 701, -      Iir_Kind_Free_Quantity_Declaration => 712, -      Iir_Kind_Across_Quantity_Declaration => 724, -      Iir_Kind_Through_Quantity_Declaration => 736, -      Iir_Kind_Enumeration_Literal => 747, -      Iir_Kind_Function_Declaration => 772, -      Iir_Kind_Procedure_Declaration => 796, -      Iir_Kind_Function_Body => 806, -      Iir_Kind_Procedure_Body => 817, -      Iir_Kind_Object_Alias_Declaration => 828, -      Iir_Kind_File_Declaration => 842, -      Iir_Kind_Guard_Signal_Declaration => 855, -      Iir_Kind_Signal_Declaration => 872, -      Iir_Kind_Variable_Declaration => 885, -      Iir_Kind_Constant_Declaration => 899, -      Iir_Kind_Iterator_Declaration => 910, -      Iir_Kind_Interface_Constant_Declaration => 926, -      Iir_Kind_Interface_Variable_Declaration => 942, -      Iir_Kind_Interface_Signal_Declaration => 963, -      Iir_Kind_Interface_File_Declaration => 979, -      Iir_Kind_Interface_Type_Declaration => 989, -      Iir_Kind_Interface_Package_Declaration => 1001, -      Iir_Kind_Interface_Function_Declaration => 1018, -      Iir_Kind_Interface_Procedure_Declaration => 1031, -      Iir_Kind_Anonymous_Signal_Declaration => 1040, -      Iir_Kind_Signal_Attribute_Declaration => 1043, -      Iir_Kind_Identity_Operator => 1047, -      Iir_Kind_Negation_Operator => 1051, -      Iir_Kind_Absolute_Operator => 1055, -      Iir_Kind_Not_Operator => 1059, -      Iir_Kind_Implicit_Condition_Operator => 1063, -      Iir_Kind_Condition_Operator => 1067, -      Iir_Kind_Reduction_And_Operator => 1071, -      Iir_Kind_Reduction_Or_Operator => 1075, -      Iir_Kind_Reduction_Nand_Operator => 1079, -      Iir_Kind_Reduction_Nor_Operator => 1083, -      Iir_Kind_Reduction_Xor_Operator => 1087, -      Iir_Kind_Reduction_Xnor_Operator => 1091, -      Iir_Kind_And_Operator => 1096, -      Iir_Kind_Or_Operator => 1101, -      Iir_Kind_Nand_Operator => 1106, -      Iir_Kind_Nor_Operator => 1111, -      Iir_Kind_Xor_Operator => 1116, -      Iir_Kind_Xnor_Operator => 1121, -      Iir_Kind_Equality_Operator => 1126, -      Iir_Kind_Inequality_Operator => 1131, -      Iir_Kind_Less_Than_Operator => 1136, -      Iir_Kind_Less_Than_Or_Equal_Operator => 1141, -      Iir_Kind_Greater_Than_Operator => 1146, -      Iir_Kind_Greater_Than_Or_Equal_Operator => 1151, -      Iir_Kind_Match_Equality_Operator => 1156, -      Iir_Kind_Match_Inequality_Operator => 1161, -      Iir_Kind_Match_Less_Than_Operator => 1166, -      Iir_Kind_Match_Less_Than_Or_Equal_Operator => 1171, -      Iir_Kind_Match_Greater_Than_Operator => 1176, -      Iir_Kind_Match_Greater_Than_Or_Equal_Operator => 1181, -      Iir_Kind_Sll_Operator => 1186, -      Iir_Kind_Sla_Operator => 1191, -      Iir_Kind_Srl_Operator => 1196, -      Iir_Kind_Sra_Operator => 1201, -      Iir_Kind_Rol_Operator => 1206, -      Iir_Kind_Ror_Operator => 1211, -      Iir_Kind_Addition_Operator => 1216, -      Iir_Kind_Substraction_Operator => 1221, -      Iir_Kind_Concatenation_Operator => 1226, -      Iir_Kind_Multiplication_Operator => 1231, -      Iir_Kind_Division_Operator => 1236, -      Iir_Kind_Modulus_Operator => 1241, -      Iir_Kind_Remainder_Operator => 1246, -      Iir_Kind_Exponentiation_Operator => 1251, -      Iir_Kind_Function_Call => 1259, -      Iir_Kind_Aggregate => 1266, -      Iir_Kind_Parenthesis_Expression => 1269, -      Iir_Kind_Qualified_Expression => 1273, -      Iir_Kind_Type_Conversion => 1278, -      Iir_Kind_Allocator_By_Expression => 1282, -      Iir_Kind_Allocator_By_Subtype => 1287, -      Iir_Kind_Selected_Element => 1295, -      Iir_Kind_Dereference => 1300, -      Iir_Kind_Implicit_Dereference => 1305, -      Iir_Kind_Slice_Name => 1312, -      Iir_Kind_Indexed_Name => 1318, -      Iir_Kind_Psl_Expression => 1320, -      Iir_Kind_Sensitized_Process_Statement => 1341, -      Iir_Kind_Process_Statement => 1361, -      Iir_Kind_Concurrent_Simple_Signal_Assignment => 1373, -      Iir_Kind_Concurrent_Conditional_Signal_Assignment => 1385, -      Iir_Kind_Concurrent_Selected_Signal_Assignment => 1398, -      Iir_Kind_Concurrent_Assertion_Statement => 1406, -      Iir_Kind_Concurrent_Procedure_Call_Statement => 1413, -      Iir_Kind_Psl_Assert_Directive => 1426, -      Iir_Kind_Psl_Assume_Directive => 1437, -      Iir_Kind_Psl_Cover_Directive => 1449, -      Iir_Kind_Psl_Restrict_Directive => 1460, -      Iir_Kind_Block_Statement => 1474, -      Iir_Kind_If_Generate_Statement => 1485, -      Iir_Kind_Case_Generate_Statement => 1494, -      Iir_Kind_For_Generate_Statement => 1503, -      Iir_Kind_Component_Instantiation_Statement => 1514, -      Iir_Kind_Psl_Default_Clock => 1518, -      Iir_Kind_Simple_Simultaneous_Statement => 1525, -      Iir_Kind_Generate_Statement_Body => 1536, -      Iir_Kind_If_Generate_Else_Clause => 1542, -      Iir_Kind_Simple_Signal_Assignment_Statement => 1552, -      Iir_Kind_Conditional_Signal_Assignment_Statement => 1562, -      Iir_Kind_Selected_Waveform_Assignment_Statement => 1573, -      Iir_Kind_Null_Statement => 1577, -      Iir_Kind_Assertion_Statement => 1584, -      Iir_Kind_Report_Statement => 1590, -      Iir_Kind_Wait_Statement => 1598, -      Iir_Kind_Variable_Assignment_Statement => 1605, -      Iir_Kind_Conditional_Variable_Assignment_Statement => 1612, -      Iir_Kind_Return_Statement => 1618, -      Iir_Kind_For_Loop_Statement => 1627, -      Iir_Kind_While_Loop_Statement => 1636, -      Iir_Kind_Next_Statement => 1643, -      Iir_Kind_Exit_Statement => 1650, -      Iir_Kind_Case_Statement => 1658, -      Iir_Kind_Procedure_Call_Statement => 1664, -      Iir_Kind_If_Statement => 1674, -      Iir_Kind_Elsif => 1680, -      Iir_Kind_Character_Literal => 1688, -      Iir_Kind_Simple_Name => 1696, -      Iir_Kind_Selected_Name => 1705, -      Iir_Kind_Operator_Symbol => 1711, -      Iir_Kind_Reference_Name => 1716, -      Iir_Kind_External_Constant_Name => 1724, -      Iir_Kind_External_Signal_Name => 1732, -      Iir_Kind_External_Variable_Name => 1741, -      Iir_Kind_Selected_By_All_Name => 1747, -      Iir_Kind_Parenthesis_Name => 1752, -      Iir_Kind_Package_Pathname => 1756, -      Iir_Kind_Absolute_Pathname => 1757, -      Iir_Kind_Relative_Pathname => 1758, -      Iir_Kind_Pathname_Element => 1763, -      Iir_Kind_Base_Attribute => 1765, -      Iir_Kind_Subtype_Attribute => 1770, -      Iir_Kind_Element_Attribute => 1775, -      Iir_Kind_Left_Type_Attribute => 1780, -      Iir_Kind_Right_Type_Attribute => 1785, -      Iir_Kind_High_Type_Attribute => 1790, -      Iir_Kind_Low_Type_Attribute => 1795, -      Iir_Kind_Ascending_Type_Attribute => 1800, -      Iir_Kind_Image_Attribute => 1806, -      Iir_Kind_Value_Attribute => 1812, -      Iir_Kind_Pos_Attribute => 1818, -      Iir_Kind_Val_Attribute => 1824, -      Iir_Kind_Succ_Attribute => 1830, -      Iir_Kind_Pred_Attribute => 1836, -      Iir_Kind_Leftof_Attribute => 1842, -      Iir_Kind_Rightof_Attribute => 1848, -      Iir_Kind_Delayed_Attribute => 1857, -      Iir_Kind_Stable_Attribute => 1866, -      Iir_Kind_Quiet_Attribute => 1875, -      Iir_Kind_Transaction_Attribute => 1884, -      Iir_Kind_Event_Attribute => 1888, -      Iir_Kind_Active_Attribute => 1892, -      Iir_Kind_Last_Event_Attribute => 1896, -      Iir_Kind_Last_Active_Attribute => 1900, -      Iir_Kind_Last_Value_Attribute => 1904, -      Iir_Kind_Driving_Attribute => 1908, -      Iir_Kind_Driving_Value_Attribute => 1912, -      Iir_Kind_Behavior_Attribute => 1912, -      Iir_Kind_Structure_Attribute => 1912, -      Iir_Kind_Simple_Name_Attribute => 1919, -      Iir_Kind_Instance_Name_Attribute => 1924, -      Iir_Kind_Path_Name_Attribute => 1929, -      Iir_Kind_Left_Array_Attribute => 1936, -      Iir_Kind_Right_Array_Attribute => 1943, -      Iir_Kind_High_Array_Attribute => 1950, -      Iir_Kind_Low_Array_Attribute => 1957, -      Iir_Kind_Length_Array_Attribute => 1964, -      Iir_Kind_Ascending_Array_Attribute => 1971, -      Iir_Kind_Range_Array_Attribute => 1978, -      Iir_Kind_Reverse_Range_Array_Attribute => 1985, -      Iir_Kind_Attribute_Name => 1994 +      Iir_Kind_Entity_Declaration => 484, +      Iir_Kind_Configuration_Declaration => 493, +      Iir_Kind_Context_Declaration => 499, +      Iir_Kind_Package_Declaration => 514, +      Iir_Kind_Package_Instantiation_Declaration => 528, +      Iir_Kind_Vmode_Declaration => 538, +      Iir_Kind_Vprop_Declaration => 548, +      Iir_Kind_Vunit_Declaration => 559, +      Iir_Kind_Package_Body => 567, +      Iir_Kind_Architecture_Body => 580, +      Iir_Kind_Type_Declaration => 587, +      Iir_Kind_Anonymous_Type_Declaration => 593, +      Iir_Kind_Subtype_Declaration => 600, +      Iir_Kind_Nature_Declaration => 606, +      Iir_Kind_Subnature_Declaration => 612, +      Iir_Kind_Package_Header => 614, +      Iir_Kind_Unit_Declaration => 623, +      Iir_Kind_Library_Declaration => 630, +      Iir_Kind_Component_Declaration => 640, +      Iir_Kind_Attribute_Declaration => 647, +      Iir_Kind_Group_Template_Declaration => 653, +      Iir_Kind_Group_Declaration => 660, +      Iir_Kind_Element_Declaration => 667, +      Iir_Kind_Non_Object_Alias_Declaration => 675, +      Iir_Kind_Psl_Declaration => 683, +      Iir_Kind_Psl_Endpoint_Declaration => 697, +      Iir_Kind_Terminal_Declaration => 704, +      Iir_Kind_Free_Quantity_Declaration => 715, +      Iir_Kind_Across_Quantity_Declaration => 727, +      Iir_Kind_Through_Quantity_Declaration => 739, +      Iir_Kind_Enumeration_Literal => 750, +      Iir_Kind_Function_Declaration => 775, +      Iir_Kind_Procedure_Declaration => 799, +      Iir_Kind_Function_Body => 809, +      Iir_Kind_Procedure_Body => 820, +      Iir_Kind_Object_Alias_Declaration => 831, +      Iir_Kind_File_Declaration => 845, +      Iir_Kind_Guard_Signal_Declaration => 858, +      Iir_Kind_Signal_Declaration => 875, +      Iir_Kind_Variable_Declaration => 888, +      Iir_Kind_Constant_Declaration => 902, +      Iir_Kind_Iterator_Declaration => 913, +      Iir_Kind_Interface_Constant_Declaration => 929, +      Iir_Kind_Interface_Variable_Declaration => 945, +      Iir_Kind_Interface_Signal_Declaration => 966, +      Iir_Kind_Interface_File_Declaration => 982, +      Iir_Kind_Interface_Type_Declaration => 992, +      Iir_Kind_Interface_Package_Declaration => 1004, +      Iir_Kind_Interface_Function_Declaration => 1021, +      Iir_Kind_Interface_Procedure_Declaration => 1034, +      Iir_Kind_Anonymous_Signal_Declaration => 1043, +      Iir_Kind_Signal_Attribute_Declaration => 1046, +      Iir_Kind_Identity_Operator => 1050, +      Iir_Kind_Negation_Operator => 1054, +      Iir_Kind_Absolute_Operator => 1058, +      Iir_Kind_Not_Operator => 1062, +      Iir_Kind_Implicit_Condition_Operator => 1066, +      Iir_Kind_Condition_Operator => 1070, +      Iir_Kind_Reduction_And_Operator => 1074, +      Iir_Kind_Reduction_Or_Operator => 1078, +      Iir_Kind_Reduction_Nand_Operator => 1082, +      Iir_Kind_Reduction_Nor_Operator => 1086, +      Iir_Kind_Reduction_Xor_Operator => 1090, +      Iir_Kind_Reduction_Xnor_Operator => 1094, +      Iir_Kind_And_Operator => 1099, +      Iir_Kind_Or_Operator => 1104, +      Iir_Kind_Nand_Operator => 1109, +      Iir_Kind_Nor_Operator => 1114, +      Iir_Kind_Xor_Operator => 1119, +      Iir_Kind_Xnor_Operator => 1124, +      Iir_Kind_Equality_Operator => 1129, +      Iir_Kind_Inequality_Operator => 1134, +      Iir_Kind_Less_Than_Operator => 1139, +      Iir_Kind_Less_Than_Or_Equal_Operator => 1144, +      Iir_Kind_Greater_Than_Operator => 1149, +      Iir_Kind_Greater_Than_Or_Equal_Operator => 1154, +      Iir_Kind_Match_Equality_Operator => 1159, +      Iir_Kind_Match_Inequality_Operator => 1164, +      Iir_Kind_Match_Less_Than_Operator => 1169, +      Iir_Kind_Match_Less_Than_Or_Equal_Operator => 1174, +      Iir_Kind_Match_Greater_Than_Operator => 1179, +      Iir_Kind_Match_Greater_Than_Or_Equal_Operator => 1184, +      Iir_Kind_Sll_Operator => 1189, +      Iir_Kind_Sla_Operator => 1194, +      Iir_Kind_Srl_Operator => 1199, +      Iir_Kind_Sra_Operator => 1204, +      Iir_Kind_Rol_Operator => 1209, +      Iir_Kind_Ror_Operator => 1214, +      Iir_Kind_Addition_Operator => 1219, +      Iir_Kind_Substraction_Operator => 1224, +      Iir_Kind_Concatenation_Operator => 1229, +      Iir_Kind_Multiplication_Operator => 1234, +      Iir_Kind_Division_Operator => 1239, +      Iir_Kind_Modulus_Operator => 1244, +      Iir_Kind_Remainder_Operator => 1249, +      Iir_Kind_Exponentiation_Operator => 1254, +      Iir_Kind_Function_Call => 1262, +      Iir_Kind_Aggregate => 1269, +      Iir_Kind_Parenthesis_Expression => 1272, +      Iir_Kind_Qualified_Expression => 1276, +      Iir_Kind_Type_Conversion => 1281, +      Iir_Kind_Allocator_By_Expression => 1285, +      Iir_Kind_Allocator_By_Subtype => 1290, +      Iir_Kind_Selected_Element => 1298, +      Iir_Kind_Dereference => 1303, +      Iir_Kind_Implicit_Dereference => 1308, +      Iir_Kind_Slice_Name => 1315, +      Iir_Kind_Indexed_Name => 1321, +      Iir_Kind_Psl_Expression => 1323, +      Iir_Kind_Sensitized_Process_Statement => 1344, +      Iir_Kind_Process_Statement => 1364, +      Iir_Kind_Concurrent_Simple_Signal_Assignment => 1376, +      Iir_Kind_Concurrent_Conditional_Signal_Assignment => 1388, +      Iir_Kind_Concurrent_Selected_Signal_Assignment => 1401, +      Iir_Kind_Concurrent_Assertion_Statement => 1409, +      Iir_Kind_Concurrent_Procedure_Call_Statement => 1416, +      Iir_Kind_Psl_Assert_Directive => 1429, +      Iir_Kind_Psl_Assume_Directive => 1440, +      Iir_Kind_Psl_Cover_Directive => 1452, +      Iir_Kind_Psl_Restrict_Directive => 1463, +      Iir_Kind_Block_Statement => 1477, +      Iir_Kind_If_Generate_Statement => 1488, +      Iir_Kind_Case_Generate_Statement => 1497, +      Iir_Kind_For_Generate_Statement => 1506, +      Iir_Kind_Component_Instantiation_Statement => 1517, +      Iir_Kind_Psl_Default_Clock => 1521, +      Iir_Kind_Simple_Simultaneous_Statement => 1528, +      Iir_Kind_Generate_Statement_Body => 1539, +      Iir_Kind_If_Generate_Else_Clause => 1545, +      Iir_Kind_Simple_Signal_Assignment_Statement => 1555, +      Iir_Kind_Conditional_Signal_Assignment_Statement => 1565, +      Iir_Kind_Selected_Waveform_Assignment_Statement => 1576, +      Iir_Kind_Null_Statement => 1580, +      Iir_Kind_Assertion_Statement => 1587, +      Iir_Kind_Report_Statement => 1593, +      Iir_Kind_Wait_Statement => 1601, +      Iir_Kind_Variable_Assignment_Statement => 1608, +      Iir_Kind_Conditional_Variable_Assignment_Statement => 1615, +      Iir_Kind_Return_Statement => 1621, +      Iir_Kind_For_Loop_Statement => 1630, +      Iir_Kind_While_Loop_Statement => 1639, +      Iir_Kind_Next_Statement => 1646, +      Iir_Kind_Exit_Statement => 1653, +      Iir_Kind_Case_Statement => 1661, +      Iir_Kind_Procedure_Call_Statement => 1667, +      Iir_Kind_If_Statement => 1677, +      Iir_Kind_Elsif => 1683, +      Iir_Kind_Character_Literal => 1691, +      Iir_Kind_Simple_Name => 1699, +      Iir_Kind_Selected_Name => 1708, +      Iir_Kind_Operator_Symbol => 1714, +      Iir_Kind_Reference_Name => 1719, +      Iir_Kind_External_Constant_Name => 1727, +      Iir_Kind_External_Signal_Name => 1735, +      Iir_Kind_External_Variable_Name => 1744, +      Iir_Kind_Selected_By_All_Name => 1750, +      Iir_Kind_Parenthesis_Name => 1755, +      Iir_Kind_Package_Pathname => 1759, +      Iir_Kind_Absolute_Pathname => 1760, +      Iir_Kind_Relative_Pathname => 1761, +      Iir_Kind_Pathname_Element => 1766, +      Iir_Kind_Base_Attribute => 1768, +      Iir_Kind_Subtype_Attribute => 1773, +      Iir_Kind_Element_Attribute => 1778, +      Iir_Kind_Left_Type_Attribute => 1783, +      Iir_Kind_Right_Type_Attribute => 1788, +      Iir_Kind_High_Type_Attribute => 1793, +      Iir_Kind_Low_Type_Attribute => 1798, +      Iir_Kind_Ascending_Type_Attribute => 1803, +      Iir_Kind_Image_Attribute => 1809, +      Iir_Kind_Value_Attribute => 1815, +      Iir_Kind_Pos_Attribute => 1821, +      Iir_Kind_Val_Attribute => 1827, +      Iir_Kind_Succ_Attribute => 1833, +      Iir_Kind_Pred_Attribute => 1839, +      Iir_Kind_Leftof_Attribute => 1845, +      Iir_Kind_Rightof_Attribute => 1851, +      Iir_Kind_Delayed_Attribute => 1860, +      Iir_Kind_Stable_Attribute => 1869, +      Iir_Kind_Quiet_Attribute => 1878, +      Iir_Kind_Transaction_Attribute => 1887, +      Iir_Kind_Event_Attribute => 1891, +      Iir_Kind_Active_Attribute => 1895, +      Iir_Kind_Last_Event_Attribute => 1899, +      Iir_Kind_Last_Active_Attribute => 1903, +      Iir_Kind_Last_Value_Attribute => 1907, +      Iir_Kind_Driving_Attribute => 1911, +      Iir_Kind_Driving_Value_Attribute => 1915, +      Iir_Kind_Behavior_Attribute => 1915, +      Iir_Kind_Structure_Attribute => 1915, +      Iir_Kind_Simple_Name_Attribute => 1922, +      Iir_Kind_Instance_Name_Attribute => 1927, +      Iir_Kind_Path_Name_Attribute => 1932, +      Iir_Kind_Left_Array_Attribute => 1939, +      Iir_Kind_Right_Array_Attribute => 1946, +      Iir_Kind_High_Array_Attribute => 1953, +      Iir_Kind_Low_Array_Attribute => 1960, +      Iir_Kind_Length_Array_Attribute => 1967, +      Iir_Kind_Ascending_Array_Attribute => 1974, +      Iir_Kind_Range_Array_Attribute => 1981, +      Iir_Kind_Reverse_Range_Array_Attribute => 1988, +      Iir_Kind_Attribute_Name => 1997       );     function Get_Fields_First (K : Iir_Kind) return Fields_Index is @@ -5282,6 +5290,8 @@ package body Vhdl.Nodes_Meta is              return Get_Inherit_Spec_Chain (N);           when Field_Vunit_Item_Chain =>              return Get_Vunit_Item_Chain (N); +         when Field_Bound_Vunit_Chain => +            return Get_Bound_Vunit_Chain (N);           when Field_Block_Configuration =>              return Get_Block_Configuration (N);           when Field_Concurrent_Statement_Chain => @@ -5682,6 +5692,8 @@ package body Vhdl.Nodes_Meta is              Set_Inherit_Spec_Chain (N, V);           when Field_Vunit_Item_Chain =>              Set_Vunit_Item_Chain (N, V); +         when Field_Bound_Vunit_Chain => +            Set_Bound_Vunit_Chain (N, V);           when Field_Block_Configuration =>              Set_Block_Configuration (N, V);           when Field_Concurrent_Statement_Chain => @@ -7395,6 +7407,18 @@ package body Vhdl.Nodes_Meta is        end case;     end Has_Vunit_Item_Chain; +   function Has_Bound_Vunit_Chain (K : Iir_Kind) return Boolean is +   begin +      case K is +         when Iir_Kind_Entity_Declaration +           | Iir_Kind_Vunit_Declaration +           | Iir_Kind_Architecture_Body => +            return True; +         when others => +            return False; +      end case; +   end Has_Bound_Vunit_Chain; +     function Has_Block_Configuration (K : Iir_Kind) return Boolean is     begin        case K is diff --git a/src/vhdl/vhdl-nodes_meta.ads b/src/vhdl/vhdl-nodes_meta.ads index f9c324171..47817c7d8 100644 --- a/src/vhdl/vhdl-nodes_meta.ads +++ b/src/vhdl/vhdl-nodes_meta.ads @@ -145,6 +145,7 @@ package Vhdl.Nodes_Meta is        Field_Hierarchical_Name,        Field_Inherit_Spec_Chain,        Field_Vunit_Item_Chain, +      Field_Bound_Vunit_Chain,        Field_Block_Configuration,        Field_Concurrent_Statement_Chain,        Field_Chain, @@ -676,6 +677,7 @@ package Vhdl.Nodes_Meta is     function Has_Hierarchical_Name (K : Iir_Kind) return Boolean;     function Has_Inherit_Spec_Chain (K : Iir_Kind) return Boolean;     function Has_Vunit_Item_Chain (K : Iir_Kind) return Boolean; +   function Has_Bound_Vunit_Chain (K : Iir_Kind) return Boolean;     function Has_Block_Configuration (K : Iir_Kind) return Boolean;     function Has_Concurrent_Statement_Chain (K : Iir_Kind) return Boolean;     function Has_Chain (K : Iir_Kind) return Boolean; diff --git a/src/vhdl/vhdl-parse.adb b/src/vhdl/vhdl-parse.adb index 95b736592..95c479a57 100644 --- a/src/vhdl/vhdl-parse.adb +++ b/src/vhdl/vhdl-parse.adb @@ -8608,6 +8608,7 @@ package body Vhdl.Parse is        Res : Iir;     begin        Res := Create_Iir (Iir_Kind_Psl_Assert_Directive); +      Set_Location (Res);        --  Accept PSL tokens        if Flags.Vhdl_Std >= Vhdl_08 then | 
