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-rw-r--r--src/simul/simul-vhdl_elab.adb20
-rw-r--r--src/simul/simul-vhdl_simul.adb4
-rw-r--r--src/synth/elab-vhdl_insts.ads10
-rw-r--r--src/synth/elab-vhdl_stmts.adb29
4 files changed, 53 insertions, 10 deletions
diff --git a/src/simul/simul-vhdl_elab.adb b/src/simul/simul-vhdl_elab.adb
index 2a254279c..1332b479b 100644
--- a/src/simul/simul-vhdl_elab.adb
+++ b/src/simul/simul-vhdl_elab.adb
@@ -740,8 +740,13 @@ package body Simul.Vhdl_Elab is
declare
Sub : constant Synth_Instance_Acc :=
Get_Sub_Instance (Inst, Stmt);
+ Hdr : constant Node := Get_Block_Header (Stmt);
begin
Gather_Processes_1 (Sub);
+ if Hdr /= Null_Node then
+ Gather_Connections (Sub, Get_Port_Chain (Hdr),
+ Inst, Get_Port_Map_Aspect_Chain (Hdr));
+ end if;
end;
when Iir_Kinds_Concurrent_Signal_Assignment
| Iir_Kind_Concurrent_Assertion_Statement
@@ -813,8 +818,19 @@ package body Simul.Vhdl_Elab is
Gather_Processes_1 (Comp_Inst);
end if;
end;
- when Iir_Kind_Generate_Statement_Body
- | Iir_Kind_Block_Statement =>
+ when Iir_Kind_Block_Statement =>
+ declare
+ Hdr : constant Node := Get_Block_Header (N);
+ begin
+ if Hdr /= Null_Node then
+ Gather_Processes_Decls (Inst, Get_Port_Chain (Hdr));
+ end if;
+ Gather_Processes_Decls
+ (Inst, Get_Declaration_Chain (N));
+ Gather_Processes_Stmts
+ (Inst, Get_Concurrent_Statement_Chain (N));
+ end;
+ when Iir_Kind_Generate_Statement_Body =>
Gather_Processes_Decls
(Inst, Get_Declaration_Chain (N));
Gather_Processes_Stmts
diff --git a/src/simul/simul-vhdl_simul.adb b/src/simul/simul-vhdl_simul.adb
index a3638f21e..a9393b277 100644
--- a/src/simul/simul-vhdl_simul.adb
+++ b/src/simul/simul-vhdl_simul.adb
@@ -2579,13 +2579,14 @@ package body Simul.Vhdl_Simul is
declare
C : Connect_Entry renames Connect_Table.Table (I);
Val : Valtyp;
+ Marker : Mark_Type;
begin
if not C.Collapsed then
if C.Actual.Base /= No_Signal_Index then
Create_Connect (C);
elsif Get_Expr_Staticness (Get_Actual (C.Assoc)) >= Globally
then
- -- TODO: association with static expr.
+ Mark_Expr_Pool (Marker);
Val := Synth.Vhdl_Expr.Synth_Expression_With_Type
(C.Assoc_Inst, Get_Actual (C.Assoc), C.Formal.Typ);
Signal_Associate_Cst
@@ -2593,6 +2594,7 @@ package body Simul.Vhdl_Simul is
C.Formal.Offs.Net_Off),
C.Formal.Typ,
Val.Val.Mem);
+ Release_Expr_Pool (Marker);
end if;
end if;
end;
diff --git a/src/synth/elab-vhdl_insts.ads b/src/synth/elab-vhdl_insts.ads
index c7392685e..f0004cc35 100644
--- a/src/synth/elab-vhdl_insts.ads
+++ b/src/synth/elab-vhdl_insts.ads
@@ -23,6 +23,16 @@ with Elab.Vhdl_Context; use Elab.Vhdl_Context;
package Elab.Vhdl_Insts is
function Elab_Top_Unit (Config : Node) return Synth_Instance_Acc;
+ procedure Elab_Generics_Association (Sub_Inst : Synth_Instance_Acc;
+ Syn_Inst : Synth_Instance_Acc;
+ Inter_Chain : Node;
+ Assoc_Chain : Node);
+
+ procedure Elab_Ports_Association_Type (Sub_Inst : Synth_Instance_Acc;
+ Syn_Inst : Synth_Instance_Acc;
+ Inter_Chain : Node;
+ Assoc_Chain : Node);
+
procedure Elab_Package_Instantiation
(Parent_Inst : Synth_Instance_Acc; Pkg : Node);
diff --git a/src/synth/elab-vhdl_stmts.adb b/src/synth/elab-vhdl_stmts.adb
index 8a0312200..c2bbe06f1 100644
--- a/src/synth/elab-vhdl_stmts.adb
+++ b/src/synth/elab-vhdl_stmts.adb
@@ -194,21 +194,36 @@ package body Elab.Vhdl_Stmts is
procedure Elab_Block_Statement (Syn_Inst : Synth_Instance_Acc; Blk : Node)
is
+ Hdr : constant Node := Get_Block_Header (Blk);
Blk_Inst : Synth_Instance_Acc;
+ Assoc : Node;
+ Inter : Node;
begin
- -- No support for guard or header.
- if Get_Block_Header (Blk) /= Null_Node
- or else Get_Guard_Decl (Blk) /= Null_Node
- then
- raise Internal_Error;
- end if;
-
Apply_Block_Configuration
(Get_Block_Block_Configuration (Blk), Blk);
Blk_Inst := Make_Elab_Instance (Syn_Inst, Blk, Null_Iir);
Create_Sub_Instance (Syn_Inst, Blk, Blk_Inst);
+ -- No support for guard.
+ if Get_Guard_Decl (Blk) /= Null_Node then
+ raise Internal_Error;
+ end if;
+
+ if Hdr /= Null_Node then
+ Inter := Get_Generic_Chain (Hdr);
+ if Inter /= Null_Node then
+ Assoc := Get_Generic_Map_Aspect_Chain (Hdr);
+ Elab_Generics_Association (Blk_Inst, Syn_Inst, Inter, Assoc);
+ end if;
+
+ Inter := Get_Port_Chain (Hdr);
+ if Inter /= Null_Node then
+ Assoc := Get_Port_Map_Aspect_Chain (Hdr);
+ Elab_Ports_Association_Type (Blk_Inst, Syn_Inst, Inter, Assoc);
+ end if;
+ end if;
+
Elab_Declarations (Blk_Inst, Get_Declaration_Chain (Blk));
Elab_Concurrent_Statements
(Blk_Inst, Get_Concurrent_Statement_Chain (Blk));