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-rw-r--r--src/vhdl/vhdl-annotations.adb3
-rw-r--r--src/vhdl/vhdl-canon.adb2
-rw-r--r--src/vhdl/vhdl-sem_psl.adb2
3 files changed, 6 insertions, 1 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb
index 36a61238e..fae87203a 100644
--- a/src/vhdl/vhdl-annotations.adb
+++ b/src/vhdl/vhdl-annotations.adb
@@ -1138,7 +1138,8 @@ package body Vhdl.Annotations is
Item := Get_Vunit_Item_Chain (Decl);
while Item /= Null_Iir loop
case Get_Kind (Item) is
- when Iir_Kind_Psl_Default_Clock =>
+ when Iir_Kind_Psl_Default_Clock
+ | Iir_Kind_Psl_Declaration =>
null;
when Iir_Kind_Psl_Assert_Directive
| Iir_Kind_Psl_Assume_Directive
diff --git a/src/vhdl/vhdl-canon.adb b/src/vhdl/vhdl-canon.adb
index 563668125..ddaed3792 100644
--- a/src/vhdl/vhdl-canon.adb
+++ b/src/vhdl/vhdl-canon.adb
@@ -3422,6 +3422,8 @@ package body Vhdl.Canon is
Canon_Psl_Sequence_Directive (Item);
when Iir_Kind_Psl_Cover_Directive =>
Canon_Psl_Cover_Directive (Item);
+ when Iir_Kind_Psl_Declaration =>
+ Canon_Concurrent_Statement (Item, Unit);
when Iir_Kind_Signal_Declaration
| Iir_Kind_Constant_Declaration
| Iir_Kind_Type_Declaration
diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb
index 51fcc8766..c000c1a47 100644
--- a/src/vhdl/vhdl-sem_psl.adb
+++ b/src/vhdl/vhdl-sem_psl.adb
@@ -1179,6 +1179,8 @@ package body Vhdl.Sem_Psl is
Sem_Psl_Restrict_Directive (Item);
when Iir_Kind_Psl_Cover_Directive =>
Sem_Psl_Cover_Directive (Item);
+ when Iir_Kind_Psl_Declaration =>
+ Sem_Psl_Declaration (Item);
when Iir_Kind_Signal_Declaration
| Iir_Kind_Constant_Declaration
| Iir_Kind_Type_Declaration