diff options
Diffstat (limited to 'src/vhdl')
-rw-r--r-- | src/vhdl/translate/trans-chap4.adb | 8 | ||||
-rw-r--r-- | src/vhdl/translate/trans-chap5.adb | 21 | ||||
-rw-r--r-- | src/vhdl/vhdl-sem_inst.adb | 16 | ||||
-rw-r--r-- | src/vhdl/vhdl-sem_stmts.adb | 2 |
4 files changed, 27 insertions, 20 deletions
diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb index 18f9546a7..0f455a83d 100644 --- a/src/vhdl/translate/trans-chap4.adb +++ b/src/vhdl/translate/trans-chap4.adb @@ -1847,12 +1847,12 @@ package body Trans.Chap4 is when Iir_Kinds_Interface_Object_Declaration => Create_Object (Decl); when Iir_Kind_Interface_Package_Declaration => - if Get_Generic_Map_Aspect_Chain (Decl) = Null_Iir then + if Get_Generic_Map_Aspect_Chain (Decl) /= Null_Iir then + -- The package is instantiated by the interface. + Chap2.Translate_Package_Instantiation_Declaration (Decl); + else -- Need a formal Create_Package_Interface (Decl); - else - -- Instantiated. - Chap2.Translate_Package_Instantiation_Declaration (Decl); end if; when Iir_Kind_Interface_Type_Declaration | Iir_Kinds_Interface_Subprogram_Declaration => diff --git a/src/vhdl/translate/trans-chap5.adb b/src/vhdl/translate/trans-chap5.adb index 3924b8552..75ccca6b3 100644 --- a/src/vhdl/translate/trans-chap5.adb +++ b/src/vhdl/translate/trans-chap5.adb @@ -902,19 +902,24 @@ package body Trans.Chap5 is Actual : constant Iir := Get_Named_Entity (Get_Actual (Assoc)); Actual_Info : constant Ortho_Info_Acc := Get_Info (Actual); + Spec_Addr, Body_Addr : O_Enode; begin + Spec_Addr := New_Address + (Get_Instance_Ref + (Actual_Info.Package_Instance_Spec_Scope), + Uninst_Info.Package_Spec_Ptr_Type); + Body_Addr := New_Address + (Get_Instance_Ref + (Actual_Info.Package_Instance_Body_Scope), + Uninst_Info.Package_Body_Ptr_Type); + Set_Map_Env (Formal_Env); New_Assign_Stmt (Get_Var (Formal_Info.Package_Instance_Spec_Var), - New_Address - (Get_Instance_Ref - (Actual_Info.Package_Instance_Spec_Scope), - Uninst_Info.Package_Spec_Ptr_Type)); + Spec_Addr); New_Assign_Stmt (Get_Var (Formal_Info.Package_Instance_Body_Var), - New_Address - (Get_Instance_Ref - (Actual_Info.Package_Instance_Body_Scope), - Uninst_Info.Package_Body_Ptr_Type)); + Body_Addr); + Set_Map_Env (Actual_Env); end; when Iir_Kind_Association_Element_Type | Iir_Kind_Association_Element_Subprogram => diff --git a/src/vhdl/vhdl-sem_inst.adb b/src/vhdl/vhdl-sem_inst.adb index ff497e10a..c2594747b 100644 --- a/src/vhdl/vhdl-sem_inst.adb +++ b/src/vhdl/vhdl-sem_inst.adb @@ -1067,14 +1067,15 @@ package body Vhdl.Sem_Inst is procedure Instantiate_Generic_Map_Chain (Inst : Iir; Pkg : Iir) is pragma Unreferenced (Pkg); - Assoc : Iir; - Inter : Iir; + Assoc, Inter : Iir; + Inter_Iter : Iir; begin Assoc := Get_Generic_Map_Aspect_Chain (Inst); - Inter := Get_Generic_Chain (Inst); + Inter_Iter := Get_Generic_Chain (Inst); while Is_Valid (Assoc) loop + Inter := Get_Association_Interface (Assoc, Inter_Iter); Instantiate_Generic_Map (Assoc, Inter); - Next_Association_Interface (Assoc, Inter); + Next_Association_Interface (Assoc, Inter_Iter); end loop; end Instantiate_Generic_Map_Chain; @@ -1301,13 +1302,14 @@ package body Vhdl.Sem_Inst is Instantiate_Generic_Chain (Inst, Get_Generic_Chain (Comp), True)); declare - Assoc, Inter : Iir; + Assoc, Inter, Inter_Iter : Iir; begin Assoc := Get_Generic_Map_Aspect_Chain (Map); - Inter := Get_Generic_Chain (Inst); + Inter_Iter := Get_Generic_Chain (Inst); while Is_Valid (Assoc) loop + Inter := Get_Association_Interface (Assoc, Inter_Iter); Instantiate_Generic_Map (Assoc, Inter); - Next_Association_Interface (Assoc, Inter); + Next_Association_Interface (Assoc, Inter_Iter); end loop; end; diff --git a/src/vhdl/vhdl-sem_stmts.adb b/src/vhdl/vhdl-sem_stmts.adb index c1c2431e1..1b5228520 100644 --- a/src/vhdl/vhdl-sem_stmts.adb +++ b/src/vhdl/vhdl-sem_stmts.adb @@ -1958,7 +1958,7 @@ package body Vhdl.Sem_Stmts is case Get_Kind (Inter) is when Iir_Kind_Interface_Package_Declaration | Iir_Kind_Interface_Type_Declaration => - Has_Type_Gen := True; + return True; when others => null; end case; |