1 files changed, 6 insertions, 89 deletions

diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb
index f8652f803..c73681b7c 100644
--- a/src/vhdl/vhdl-sem_psl.adb
+++ b/src/vhdl/vhdl-sem_psl.adb
@@ -121,7 +121,7 @@ package body Vhdl.Sem_Psl is
       return Call;
    end Sem_Prev_Builtin;
 
-   function Sem_Stable_Builtin (Call : Iir) return Iir
+   function Sem_Clock_Builtin (Call : Iir) return Iir
    is
       use Vhdl.Sem_Expr;
       use Vhdl.Std_Package;
@@ -146,7 +146,7 @@ package body Vhdl.Sem_Psl is
             Set_Clock_Expression (Call, Clock);
          else
             if Current_Psl_Default_Clock = Null_Iir then
-               Error_Msg_Sem (+Call, "no clock for PSL stable builtin");
+               Error_Msg_Sem (+Call, "no clock for %n", +Call);
             else
                Set_Default_Clock (Call, Current_Psl_Default_Clock);
             end if;
@@ -154,77 +154,7 @@ package body Vhdl.Sem_Psl is
       end if;
 
       return Call;
-   end Sem_Stable_Builtin;
-
-   function Sem_Rose_Builtin (Call : Iir) return Iir
-   is
-      use Vhdl.Sem_Expr;
-      use Vhdl.Std_Package;
-      Expr  : Iir;
-      Clock : Iir;
-      First : Boolean;
-   begin
-      Expr := Get_Expression (Call);
-      First := Is_Expr_Not_Analyzed (Expr);
-      Expr := Sem_Expression (Expr, Null_Iir);
-      if Expr /= Null_Iir then
-         Set_Expression (Call, Expr);
-         Set_Type (Call, Vhdl.Std_Package.Boolean_Type_Definition);
-         Set_Expr_Staticness (Call, None);
-      end if;
-
-      if First then
-         --  Analyze clock only once.
-         Clock := Get_Clock_Expression (Call);
-         if Clock /= Null_Iir then
-            Clock := Sem_Expression_Wildcard (Clock, Wildcard_Psl_Bit_Type);
-            Set_Clock_Expression (Call, Clock);
-         else
-            if Current_Psl_Default_Clock = Null_Iir then
-               Error_Msg_Sem (+Call, "no clock for PSL rose builtin");
-            else
-               Set_Default_Clock (Call, Current_Psl_Default_Clock);
-            end if;
-         end if;
-      end if;
-
-      return Call;
-   end Sem_Rose_Builtin;
-
-   function Sem_Fell_Builtin (Call : Iir) return Iir
-   is
-      use Vhdl.Sem_Expr;
-      use Vhdl.Std_Package;
-      Expr  : Iir;
-      Clock : Iir;
-      First : Boolean;
-   begin
-      Expr := Get_Expression (Call);
-      First := Is_Expr_Not_Analyzed (Expr);
-      Expr := Sem_Expression (Expr, Null_Iir);
-      if Expr /= Null_Iir then
-         Set_Expression (Call, Expr);
-         Set_Type (Call, Vhdl.Std_Package.Boolean_Type_Definition);
-         Set_Expr_Staticness (Call, None);
-      end if;
-
-      if First then
-         --  Analyze clock only once.
-         Clock := Get_Clock_Expression (Call);
-         if Clock /= Null_Iir then
-            Clock := Sem_Expression_Wildcard (Clock, Wildcard_Psl_Bit_Type);
-            Set_Clock_Expression (Call, Clock);
-         else
-            if Current_Psl_Default_Clock = Null_Iir then
-               Error_Msg_Sem (+Call, "no clock for PSL fell builtin");
-            else
-               Set_Default_Clock (Call, Current_Psl_Default_Clock);
-            end if;
-         end if;
-      end if;
-
-      return Call;
-   end Sem_Fell_Builtin;
+   end Sem_Clock_Builtin;
 
    function Sem_Onehot_Builtin (Call : Iir) return Iir
    is
@@ -238,26 +168,13 @@ package body Vhdl.Sem_Psl is
          Set_Expression (Call, Expr);
          Set_Type (Call, Vhdl.Std_Package.Boolean_Type_Definition);
          Set_Expr_Staticness (Call, None);
+         if not Is_Psl_Bitvector_Type (Get_Type (Expr)) then
+            Error_Msg_Sem (+Call, "type of parameter must be bitvector");
+         end if;
       end if;
       return Call;
    end Sem_Onehot_Builtin;
 
-   function Sem_Onehot0_Builtin (Call : Iir) return Iir
-   is
-      use Vhdl.Sem_Expr;
-      use Vhdl.Std_Package;
-      Expr : Iir;
-   begin
-      Expr := Get_Expression (Call);
-      Expr := Sem_Expression (Expr, Null_Iir);
-      if Expr /= Null_Iir then
-         Set_Expression (Call, Expr);
-         Set_Type (Call, Vhdl.Std_Package.Boolean_Type_Definition);
-         Set_Expr_Staticness (Call, None);
-      end if;
-      return Call;
-   end Sem_Onehot0_Builtin;
-
    --  Convert VHDL and/or/not nodes to PSL nodes.
    function Convert_Bool (Expr : Iir) return PSL_Node;