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-rw-r--r--src/ghdldrv/ghdlsynth.adb9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/ghdldrv/ghdlsynth.adb b/src/ghdldrv/ghdlsynth.adb
index 890be63ec..5d76355aa 100644
--- a/src/ghdldrv/ghdlsynth.adb
+++ b/src/ghdldrv/ghdlsynth.adb
@@ -439,8 +439,13 @@ package body Ghdlsynth is
when Format_Dot =>
Netlists.Disp_Dot.Disp_Dot_Top_Module (Res);
when Format_Vhdl =>
- Ent := Vhdl.Utils.Get_Entity_From_Configuration (Config);
- Synth.Disp_Vhdl.Disp_Vhdl_Wrapper (Ent, Res, Inst);
+ if Get_Kind (Config) = Iir_Kind_Foreign_Module then
+ -- Not a VHDL design.
+ Netlists.Disp_Vhdl.Disp_Vhdl (Res);
+ else
+ Ent := Vhdl.Utils.Get_Entity_From_Configuration (Config);
+ Synth.Disp_Vhdl.Disp_Vhdl_Wrapper (Ent, Res, Inst);
+ end if;
when Format_Raw_Vhdl =>
Netlists.Disp_Vhdl.Disp_Vhdl (Res);
when Format_Verilog =>