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Diffstat (limited to 'doc/examples/quick_start/adder/adder.vhdl')
-rw-r--r-- | doc/examples/quick_start/adder/adder.vhdl | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/doc/examples/quick_start/adder/adder.vhdl b/doc/examples/quick_start/adder/adder.vhdl deleted file mode 100644 index cf60e8fbe..000000000 --- a/doc/examples/quick_start/adder/adder.vhdl +++ /dev/null @@ -1,14 +0,0 @@ -entity adder is - -- `i0`, `i1`, and the carry-in `ci` are inputs of the adder. - -- `s` is the sum output, `co` is the carry-out. - port (i0, i1 : in bit; ci : in bit; s : out bit; co : out bit); -end adder; - -architecture rtl of adder is -begin - -- This full-adder architecture contains two concurrent assignments. - -- Compute the sum. - s <= i0 xor i1 xor ci; - -- Compute the carry. - co <= (i0 and i1) or (i0 and ci) or (i1 and ci); -end rtl; |