diff options
| -rw-r--r-- | pyGHDL/dom/Concurrent.py | 9 | ||||
| -rw-r--r-- | pyGHDL/dom/DesignUnit.py | 15 | ||||
| -rw-r--r-- | pyGHDL/dom/Sequential.py | 106 | ||||
| -rw-r--r-- | pyGHDL/dom/_Translate.py | 21 |
4 files changed, 88 insertions, 63 deletions
diff --git a/pyGHDL/dom/Concurrent.py b/pyGHDL/dom/Concurrent.py index b411553c5..953d4d6e3 100644 --- a/pyGHDL/dom/Concurrent.py +++ b/pyGHDL/dom/Concurrent.py @@ -232,6 +232,7 @@ class IfGenerateBranch(VHDLModel_IfGenerateBranch): condition = GetExpressionFromNode(nodes.Get_Condition(generateNode)) body = nodes.Get_Generate_Statement_Body(generateNode) + # TODO: alternative label alternativeLabelId = nodes.Get_Alternative_Label(body) alternativeLabel = "" @@ -272,6 +273,7 @@ class ElsifGenerateBranch(VHDLModel_ElsifGenerateBranch): condition = GetExpressionFromNode(condition) body = nodes.Get_Generate_Statement_Body(generateNode) + # TODO: alternative label alternativeLabelId = nodes.Get_Alternative_Label(body) alternativeLabel = "" @@ -309,6 +311,7 @@ class ElseGenerateBranch(VHDLModel_ElseGenerateBranch): body = nodes.Get_Generate_Statement_Body(generateNode) + # TODO: alternative label alternativeLabelId = nodes.Get_Alternative_Label(body) alternativeLabel = "" @@ -398,6 +401,7 @@ class GenerateCase(VHDLModel_GenerateCase, DOMMixin): body = nodes.Get_Associated_Block(caseNode) + # TODO: alternative label alternativeLabelId = nodes.Get_Alternative_Label(body) alternativeLabel = "" @@ -435,6 +439,7 @@ class OthersGenerateCase(VHDLModel_OthersGenerateCase, DOMMixin): body = nodes.Get_Associated_Block(caseNode) + # TODO: alternative label alternativeLabelId = nodes.Get_Alternative_Label(body) alternativeLabel = "" @@ -472,8 +477,6 @@ class CaseGenerateStatement(VHDLModel_CaseGenerateStatement, DOMMixin): GetNameFromNode, ) - # TODO: get choices - expression = GetExpressionFromNode(nodes.Get_Expression(generateNode)) cases = [] @@ -524,7 +527,7 @@ class CaseGenerateStatement(VHDLModel_CaseGenerateStatement, DOMMixin): continue elif choiceKind is nodes.Iir_Kind.Choice_By_Others: if choices is not None: - cases.append(GenerateCase.parse(caseNode, choices)) + cases.append(GenerateCase.parse(alternative, choices)) choices = None cases.append(OthersGenerateCase.parse(alternative)) alternative = nodes.Get_Chain(alternative) diff --git a/pyGHDL/dom/DesignUnit.py b/pyGHDL/dom/DesignUnit.py index b7d8ec339..e8dfccbd7 100644 --- a/pyGHDL/dom/DesignUnit.py +++ b/pyGHDL/dom/DesignUnit.py @@ -119,6 +119,8 @@ class Entity(VHDLModel_Entity, DOMMixin): nodes.Get_Concurrent_Statement_Chain(entityNode), "entity", name ) + # FIXME: read use clauses + return cls(entityNode, name, generics, ports, declaredItems, statements) @@ -148,10 +150,9 @@ class Architecture(VHDLModel_Architecture, DOMMixin): nodes.Get_Concurrent_Statement_Chain(architectureNode), "architecture", name ) - return cls(architectureNode, name, entity, declaredItems, statements) + # FIXME: read use clauses - def resolve(self): - pass + return cls(architectureNode, name, entity, declaredItems, statements) @export @@ -203,6 +204,8 @@ class Package(VHDLModel_Package, DOMMixin): nodes.Get_Declaration_Chain(packageNode), "package", name ) + # FIXME: read use clauses + return cls(packageNode, name, generics, declaredItems) @@ -224,6 +227,8 @@ class PackageBody(VHDLModel_PackageBody, DOMMixin): nodes.Get_Declaration_Chain(packageBodyNode), "package", name ) + # FIXME: read use clauses + return cls(packageBodyNode, name, declaredItems) @@ -244,6 +249,7 @@ class PackageInstantiation(VHDLModel_PackageInstantiation, DOMMixin): name = GetNameOfNode(packageNode) uninstantiatedPackageName = nodes.Get_Uninstantiated_Package_Name(packageNode) + # FIXME: read use clauses (does it apply here too?) # FIXME: read generics # FIXME: read generic map @@ -283,6 +289,7 @@ class Configuration(VHDLModel_Configuration, DOMMixin): def parse(cls, configurationNode: Iir): name = GetNameOfNode(configurationNode) - # FIXME: needs an implementation + # FIXME: read use clauses + # FIXME: read specifications return cls(configurationNode, name) diff --git a/pyGHDL/dom/Sequential.py b/pyGHDL/dom/Sequential.py index 6e04b9a04..0503eca25 100644 --- a/pyGHDL/dom/Sequential.py +++ b/pyGHDL/dom/Sequential.py @@ -132,6 +132,7 @@ class ElseBranch(VHDLModel_ElseBranch): from pyGHDL.dom._Translate import ( GetSequentialStatementsFromChainedNodes, ) + statementChain = nodes.Get_Sequential_Statement_Chain(branchNode) statements = GetSequentialStatementsFromChainedNodes( statementChain, "else branch", label @@ -195,26 +196,26 @@ class Case(VHDLModel_Case, DOMMixin): self, node: Iir, choices: Iterable[SequentialChoice], - statements: Iterable[SequentialStatement], + statements: Iterable[SequentialStatement] = None, ): super().__init__(choices, statements) DOMMixin.__init__(self, node) @classmethod - def parse(cls, caseNode: Iir, label: str) -> "Case": - from pyGHDL.dom._Translate import ( - GetSequentialStatementsFromChainedNodes, - ) + def parse( + cls, caseNode: Iir, choices: Iterable[SequentialChoice], label: str + ) -> "Case": + from pyGHDL.dom._Translate import GetSequentialStatementsFromChainedNodes - body = nodes.Get_Generate_Statement_Body(caseNode) + block = nodes.Get_Associated_Block(caseNode) + if block is nodes.Null_Iir: + return cls(caseNode, choices) - statementChain = nodes.Get_Sequential_Statement_Chain(body) + statementChain = nodes.Get_Sequential_Statement_Chain(block) statements = GetSequentialStatementsFromChainedNodes( statementChain, "case", label ) - choices = [] - return cls(caseNode, choices, statements) @@ -229,21 +230,19 @@ class OthersCase(VHDLModel_OthersCase, DOMMixin): DOMMixin.__init__(self, caseNode) @classmethod - def parse(cls, caseNode: Iir) -> "OthersCase": - from pyGHDL.dom._Translate import ( - GetDeclaredItemsFromChainedNodes, - GetSequentialStatementsFromChainedNodes, - ) + def parse(cls, caseNode: Iir, label: str = None) -> "OthersCase": + from pyGHDL.dom._Translate import GetSequentialStatementsFromChainedNodes - # body = nodes.Get_Generate_Statement_Body(caseNode) - # - # statementChain = nodes.Get_Sequential_Statement_Chain(body) - # statements = GetStatementsFromChainedNodes( - # statementChain, "else branch", alternativeLabel - # ) + body = nodes.Get_Associated_Block(caseNode) + if body is nodes.Null_Iir: + return cls(caseNode) - # return cls(caseNode, declaredItems, statements, alternativeLabel) - return cls(caseNode, [], [], "") + statementChain = nodes.Get_Concurrent_Statement_Chain(body) + statements = GetSequentialStatementsFromChainedNodes( + statementChain, "case others", label + ) + + return cls(caseNode, statements) @export @@ -267,15 +266,17 @@ class CaseStatement(VHDLModel_CaseStatement, DOMMixin): GetNameFromNode, ) - # TODO: get choices - expression = GetExpressionFromNode(nodes.Get_Expression(caseNode)) cases = [] - choices = [] - alternatives = nodes.Get_Case_Statement_Alternative_Chain(caseNode) - for alternative in utils.chain_iter(alternatives): + choices = None + alternative = nodes.Get_Case_Statement_Alternative_Chain(caseNode) + caseNode = alternative + + while alternative != nodes.Null_Iir: choiceKind = GetIirKindOfNode(alternative) + sameAlternative = nodes.Get_Same_Alternative_Flag(alternative) + print("sameAlternative: ", sameAlternative) if choiceKind in ( nodes.Iir_Kind.Choice_By_Name, @@ -284,9 +285,12 @@ class CaseStatement(VHDLModel_CaseStatement, DOMMixin): choiceExpression = GetExpressionFromNode( nodes.Get_Choice_Expression(alternative) ) - choices.append(IndexedChoice(alternative, choiceExpression)) - cases.append(Case(alternative, choices)) - choices = [] + + choice = IndexedChoice(alternative, choiceExpression) + if sameAlternative: + choices.append(choice) + alternative = nodes.Get_Chain(alternative) + continue elif choiceKind is nodes.Iir_Kind.Choice_By_Range: choiceRange = nodes.Get_Choice_Range(alternative) choiceRangeKind = GetIirKindOfNode(choiceRange) @@ -298,20 +302,46 @@ class CaseStatement(VHDLModel_CaseStatement, DOMMixin): ): rng = GetNameFromNode(choiceRange) else: - pos = Position.parse(caseNode) + pos = Position.parse(alternative) raise DOMException( "Unknown choice range kind '{kind}' in case statement at line {line}.".format( kind=choiceRangeKind.name, line=pos.Line ) ) - choices.append(RangedChoice(alternative, rng)) - cases.append(Case(alternative, choices)) - choices = [] + choice = RangedChoice(alternative, rng) + if sameAlternative: + choices.append(choice) + alternative = nodes.Get_Chain(alternative) + continue elif choiceKind is nodes.Iir_Kind.Choice_By_Others: - cases.append(OthersCase.parse(alternative)) + if choices is not None: + cases.append(Case.parse(alternative, choices, label)) + choices = None + cases.append(OthersCase.parse(alternative, label)) + alternative = nodes.Get_Chain(alternative) + caseNode = alternative + continue else: - print(choiceKind) + pos = Position.parse(alternative) + raise DOMException( + "Unknown choice kind '{kind}' in case statement at line {line}.".format( + kind=choiceKind.name, line=pos.Line + ) + ) + + if choices is not None: + cases.append(Case.parse(alternative, choices, label)) + + caseNode = alternative + choices = [ + choice, + ] + + alternative = nodes.Get_Chain(alternative) + + if choices is not None: + cases.append(Case.parse(alternative, choices, label)) return cls(caseNode, label, expression, cases) @@ -358,9 +388,7 @@ class ForLoopStatement(VHDLModel_ForLoopStatement, DOMMixin): ) ) - body = nodes.Get_Generate_Statement_Body(loopNode) - - statementChain = nodes.Get_Sequential_Statement_Chain(body) + statementChain = nodes.Get_Sequential_Statement_Chain(loopNode) statements = GetSequentialStatementsFromChainedNodes( statementChain, "for", label ) diff --git a/pyGHDL/dom/_Translate.py b/pyGHDL/dom/_Translate.py index f5f2eda3e..18a4d9fda 100644 --- a/pyGHDL/dom/_Translate.py +++ b/pyGHDL/dom/_Translate.py @@ -34,6 +34,7 @@ from typing import List, Generator from pydecor import export +from pyGHDL.dom.Sequential import IfStatement, ForLoopStatement, CaseStatement from pyVHDLModel.SyntaxModel import ( Constraint, Direction, @@ -872,26 +873,12 @@ def GetSequentialStatementsFromChainedNodes( pos = Position.parse(statement) kind = GetIirKindOfNode(statement) - # if kind == nodes.Iir_Kind.Sensitized_Process_Statement: - # yield ProcessStatement.parse(statement, label, True) if kind == nodes.Iir_Kind.If_Statement: - print( - "[NOT IMPLEMENTED] If statement (label: '{label}') at line {line}".format( - label=label, line=pos.Line - ) - ) + yield IfStatement.parse(statement, label) elif kind == nodes.Iir_Kind.For_Loop_Statement: - print( - "[NOT IMPLEMENTED] For-loop statement (label: '{label}') at line {line}".format( - label=label, line=pos.Line - ) - ) + yield ForLoopStatement.parse(statement, label) elif kind == nodes.Iir_Kind.Case_Statement: - print( - "[NOT IMPLEMENTED] For-loop statement (label: '{label}') at line {line}".format( - label=label, line=pos.Line - ) - ) + yield CaseStatement.parse(statement, label) elif kind == nodes.Iir_Kind.Simple_Signal_Assignment_Statement: print( "[NOT IMPLEMENTED] (Simple) signal assignment (label: '{label}') at line {line}".format( |