diff options
-rw-r--r-- | testsuite/synth/anon01/anon02.vhdl | 26 | ||||
-rwxr-xr-x | testsuite/synth/anon01/testsuite.sh | 11 |
2 files changed, 29 insertions, 8 deletions
diff --git a/testsuite/synth/anon01/anon02.vhdl b/testsuite/synth/anon01/anon02.vhdl new file mode 100644 index 000000000..5628d9afc --- /dev/null +++ b/testsuite/synth/anon01/anon02.vhdl @@ -0,0 +1,26 @@ +entity anon02_sub is + port (i : bit_vector (7 downto 0); + o : out bit_vector (7 downto 0)); +end anon02_sub; + +architecture behav of anon02_sub is +begin + o <= i xor x"a5"; +end behav; + +entity anon02 is + port (i : bit_vector (6 downto 0); + o : out bit_vector (6 downto 0)); +end anon02; + +architecture behav of anon02 is + signal res : bit_vector (7 downto 0); +begin + dut: entity work.anon02_sub + port map (i => '0' & i, + o => res); + o <= res (6 downto 0); + gen: for i in 1 to 2 generate + assert i < 3; + end generate; +end behav; diff --git a/testsuite/synth/anon01/testsuite.sh b/testsuite/synth/anon01/testsuite.sh index 254a334d6..eacda9006 100755 --- a/testsuite/synth/anon01/testsuite.sh +++ b/testsuite/synth/anon01/testsuite.sh @@ -5,14 +5,9 @@ GHDL_STD_FLAGS=--std=08 for t in anon01; do - analyze $t.vhdl tb_$t.vhdl - elab_simulate tb_$t - clean - - synth $t.vhdl -e $t > syn_$t.vhdl - analyze syn_$t.vhdl tb_$t.vhdl - elab_simulate tb_$t --ieee-asserts=disable-at-0 - clean + synth_tb $t done +synth_analyze anon02 + echo "Test successful" |