diff options
| -rw-r--r-- | src/synth/synth-vhdl_eval.adb | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/src/synth/synth-vhdl_eval.adb b/src/synth/synth-vhdl_eval.adb index c96e24721..ec3b19e99 100644 --- a/src/synth/synth-vhdl_eval.adb +++ b/src/synth/synth-vhdl_eval.adb @@ -2482,24 +2482,6 @@ package body Synth.Vhdl_Eval is return Create_Memory_U8 (Std_Ulogic'Pos (Res), Res_Typ); end; - when Iir_Predefined_Ieee_Math_Real_Pow_Real_Real => - declare - function Pow (L, R : Fp64) return Fp64; - pragma Import (C, Pow); - begin - return Create_Memory_Fp64 - (Pow (Read_Fp64 (Param1), Read_Fp64 (Param2)), Res_Typ); - end; - - when Iir_Predefined_Ieee_Math_Real_Mod => - declare - function Fmod (L, R : Fp64) return Fp64; - pragma Import (C, Fmod); - begin - return Create_Memory_Fp64 - (Fmod (Read_Fp64 (Param1), Read_Fp64 (Param2)), Res_Typ); - end; - when Iir_Predefined_Physical_Minimum | Iir_Predefined_Integer_Minimum | Iir_Predefined_Enum_Minimum => @@ -2969,6 +2951,24 @@ package body Synth.Vhdl_Eval is | Iir_Predefined_Ieee_Std_Logic_Misc_Xnor_Reduce_Suv => return Eval_Vector_Reduce ('0', Param1, Xor_Table, True); + when Iir_Predefined_Ieee_Math_Real_Pow_Real_Real => + declare + function Pow (L, R : Fp64) return Fp64; + pragma Import (C, Pow); + begin + return Create_Memory_Fp64 + (Pow (Read_Fp64 (Param1), Read_Fp64 (Param2)), Res_Typ); + end; + + when Iir_Predefined_Ieee_Math_Real_Mod => + declare + function Fmod (L, R : Fp64) return Fp64; + pragma Import (C, Fmod); + begin + return Create_Memory_Fp64 + (Fmod (Read_Fp64 (Param1), Read_Fp64 (Param2)), Res_Typ); + end; + when Iir_Predefined_Ieee_Math_Real_Sign => declare Val : constant Fp64 := Read_Fp64 (Param1); |