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-rw-r--r--src/synth/synth-decls.adb17
-rw-r--r--src/vhdl/vhdl-annotations.adb10
2 files changed, 22 insertions, 5 deletions
diff --git a/src/synth/synth-decls.adb b/src/synth/synth-decls.adb
index b31e2c1cb..53a5b0c5f 100644
--- a/src/synth/synth-decls.adb
+++ b/src/synth/synth-decls.adb
@@ -205,10 +205,19 @@ package body Synth.Decls is
Etyp : Type_Acc;
Bnds : Bound_Array_Acc;
begin
- -- LRM93 12.3.1.3
- -- The elaboration of an index constraint consists of the
- -- declaration of each of the discrete ranges in the index
- -- constraint in some order that is not defined by the language.
+ -- VHDL08
+ if Get_Array_Element_Constraint (Atype) /= Null_Node
+ or else
+ (Get_Resolution_Indication (Atype) /= Null_Node
+ and then
+ (Get_Kind (Get_Resolution_Indication (Atype))
+ = Iir_Kind_Array_Element_Resolution))
+ then
+ -- This subtype has created a new anonymous subtype for the
+ -- element.
+ Synth_Subtype_Indication (Syn_Inst, El_Type);
+ end if;
+
Etyp := Get_Value_Type (Syn_Inst, El_Type);
if Etyp.Kind = Type_Bit
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb
index d61117bb4..cb44f98f0 100644
--- a/src/vhdl/vhdl-annotations.adb
+++ b/src/vhdl/vhdl-annotations.adb
@@ -383,7 +383,15 @@ package body Vhdl.Annotations is
end if;
when Iir_Kind_Array_Subtype_Definition =>
- if Get_Array_Element_Constraint (Def) /= Null_Node then
+ if Get_Array_Element_Constraint (Def) /= Null_Node
+ or else
+ (Get_Resolution_Indication (Def) /= Null_Node
+ and then
+ (Get_Kind (Get_Resolution_Indication (Def))
+ = Iir_Kind_Array_Element_Resolution))
+ then
+ -- This subtype has created a new anonymous subtype for the
+ -- element.
Annotate_Type_Definition
(Block_Info, Get_Element_Subtype (Def));
end if;