diff options
-rw-r--r-- | pyGHDL/libghdl/std_names.py | 483 | ||||
-rw-r--r-- | pyGHDL/libghdl/vhdl/nodes.py | 433 | ||||
-rw-r--r-- | src/std_names.adb | 23 | ||||
-rw-r--r-- | src/std_names.ads | 27 | ||||
-rw-r--r-- | src/vhdl/vhdl-ieee-numeric_std_unsigned.adb | 105 | ||||
-rw-r--r-- | src/vhdl/vhdl-ieee-numeric_std_unsigned.ads | 22 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes.ads | 3 | ||||
-rw-r--r-- | src/vhdl/vhdl-post_sems.adb | 7 |
8 files changed, 621 insertions, 482 deletions
diff --git a/pyGHDL/libghdl/std_names.py b/pyGHDL/libghdl/std_names.py index aad5918fe..ebef045ff 100644 --- a/pyGHDL/libghdl/std_names.py +++ b/pyGHDL/libghdl/std_names.py @@ -571,244 +571,245 @@ class Name: VITAL_Timing = 782 Numeric_Std = 783 Numeric_Bit = 784 - Std_Logic_Arith = 785 - Std_Logic_Signed = 786 - Std_Logic_Unsigned = 787 - Std_Logic_Textio = 788 - Std_Logic_Misc = 789 - Math_Real = 790 - Last_Ieee_Pkg = 790 - First_Ieee_Name = 791 - Std_Ulogic = 791 - Std_Ulogic_Vector = 792 - Std_Logic = 793 - Std_Logic_Vector = 794 - Rising_Edge = 795 - Falling_Edge = 796 - VITAL_Level0 = 797 - VITAL_Level1 = 798 - Unresolved_Unsigned = 799 - Unresolved_Signed = 800 - To_Integer = 801 - To_Unsigned = 802 - To_Signed = 803 - Resize = 804 - Std_Match = 805 - Shift_Left = 806 - Shift_Right = 807 - Rotate_Left = 808 - Rotate_Right = 809 - To_Bit = 810 - To_Bitvector = 811 - To_Stdulogic = 812 - To_Stdlogicvector = 813 - To_Stdulogicvector = 814 - Is_X = 815 - To_01 = 816 - To_X01 = 817 - To_X01Z = 818 - To_UX01 = 819 - Conv_Signed = 820 - Conv_Unsigned = 821 - Conv_Integer = 822 - Conv_Std_Logic_Vector = 823 - And_Reduce = 824 - Nand_Reduce = 825 - Or_Reduce = 826 - Nor_Reduce = 827 - Xor_Reduce = 828 - Xnor_Reduce = 829 - Ceil = 830 - Floor = 831 - Round = 832 - Log2 = 833 - Sin = 834 - Cos = 835 - Shl = 836 - Shr = 837 - Ext = 838 - Sxt = 839 - Find_Leftmost = 840 - Find_Rightmost = 841 - Last_Ieee_Name = 841 - First_Synthesis = 842 - Allconst = 842 - Allseq = 843 - Anyconst = 844 - Anyseq = 845 - Last_Synthesis = 845 - First_Directive = 846 - Define = 846 - Endif = 847 - Ifdef = 848 - Ifndef = 849 - Include = 850 - Timescale = 851 - Undef = 852 - Protect = 853 - Begin_Protected = 854 - End_Protected = 855 - Key_Block = 856 - Data_Block = 857 - Line = 858 - Celldefine = 859 - Endcelldefine = 860 - Default_Nettype = 861 - Resetall = 862 - Last_Directive = 862 - First_Systask = 863 - Bits = 863 - D_Root = 864 - D_Unit = 865 - Last_Systask = 865 - First_SV_Method = 866 - Size = 866 - Insert = 867 - Delete = 868 - Pop_Front = 869 - Pop_Back = 870 - Push_Front = 871 - Push_Back = 872 - Name = 873 - Len = 874 - Substr = 875 - Exists = 876 - Atoi = 877 - Itoa = 878 - Find = 879 - Find_Index = 880 - Find_First = 881 - Find_First_Index = 882 - Find_Last = 883 - Find_Last_Index = 884 - Num = 885 - Randomize = 886 - Pre_Randomize = 887 - Post_Randomize = 888 - Srandom = 889 - Get_Randstate = 890 - Set_Randstate = 891 - Seed = 892 - State = 893 - Last_SV_Method = 893 - First_BSV = 894 - uAction = 894 - uActionValue = 895 - BVI = 896 - uC = 897 - uCF = 898 - uE = 899 - uSB = 900 - uSBR = 901 - Action = 902 - Endaction = 903 - Actionvalue = 904 - Endactionvalue = 905 - Ancestor = 906 - Clocked_By = 907 - Default_Clock = 908 - Default_Reset = 909 - Dependencies = 910 - Deriving = 911 - Determines = 912 - Enable = 913 - Ifc_Inout = 914 - Input_Clock = 915 - Input_Reset = 916 - Instance = 917 - Endinstance = 918 - Let = 919 - Match = 920 - Method = 921 - Endmethod = 922 - Numeric = 923 - Output_Clock = 924 - Output_Reset = 925 - Par = 926 - Endpar = 927 - Path = 928 - Provisos = 929 - Ready = 930 - Reset_By = 931 - Rule = 932 - Endrule = 933 - Rules = 934 - Endrules = 935 - Same_Family = 936 - Schedule = 937 - Seq = 938 - Endseq = 939 - Typeclass = 940 - Endtypeclass = 941 - Valueof = 942 - uValueof = 943 - Last_BSV = 943 - First_Comment = 944 - Psl = 944 - Pragma = 945 - Synthesis = 946 - Synopsys = 947 - Translate_Off = 948 - Translate_On = 949 - Translate = 950 - Synthesis_Off = 951 - Synthesis_On = 952 - Off = 953 - Last_Comment = 953 - First_PSL = 954 - A = 954 - Af = 955 - Ag = 956 - Ax = 957 - Abort = 958 - Assume_Guarantee = 959 - Before = 960 - Clock = 961 - E = 962 - Ef = 963 - Eg = 964 - Ex = 965 - Endpoint = 966 - Eventually = 967 - Fairness = 968 - Fell = 969 - Forall = 970 - G = 971 - Inf = 972 - Inherit = 973 - Never = 974 - Next_A = 975 - Next_E = 976 - Next_Event = 977 - Next_Event_A = 978 - Next_Event_E = 979 - Prev = 980 - Rose = 981 - Strong = 982 - W = 983 - Whilenot = 984 - Within = 985 - X = 986 - Last_PSL = 986 - First_Edif = 987 - Celltype = 997 - View = 998 - Viewtype = 999 - Direction = 1000 - Contents = 1001 - Net = 1002 - Viewref = 1003 - Cellref = 1004 - Libraryref = 1005 - Portinstance = 1006 - Joined = 1007 - Portref = 1008 - Instanceref = 1009 - Design = 1010 - Designator = 1011 - Owner = 1012 - Member = 1013 - Number = 1014 - Rename = 1015 - Userdata = 1016 - Last_Edif = 1016 + Numeric_Std_Unsigned = 785 + Std_Logic_Arith = 786 + Std_Logic_Signed = 787 + Std_Logic_Unsigned = 788 + Std_Logic_Textio = 789 + Std_Logic_Misc = 790 + Math_Real = 791 + Last_Ieee_Pkg = 791 + First_Ieee_Name = 792 + Std_Ulogic = 792 + Std_Ulogic_Vector = 793 + Std_Logic = 794 + Std_Logic_Vector = 795 + Rising_Edge = 796 + Falling_Edge = 797 + VITAL_Level0 = 798 + VITAL_Level1 = 799 + Unresolved_Unsigned = 800 + Unresolved_Signed = 801 + To_Integer = 802 + To_Unsigned = 803 + To_Signed = 804 + Resize = 805 + Std_Match = 806 + Shift_Left = 807 + Shift_Right = 808 + Rotate_Left = 809 + Rotate_Right = 810 + To_Bit = 811 + To_Bitvector = 812 + To_Stdulogic = 813 + To_Stdlogicvector = 814 + To_Stdulogicvector = 815 + Is_X = 816 + To_01 = 817 + To_X01 = 818 + To_X01Z = 819 + To_UX01 = 820 + Conv_Signed = 821 + Conv_Unsigned = 822 + Conv_Integer = 823 + Conv_Std_Logic_Vector = 824 + And_Reduce = 825 + Nand_Reduce = 826 + Or_Reduce = 827 + Nor_Reduce = 828 + Xor_Reduce = 829 + Xnor_Reduce = 830 + Ceil = 831 + Floor = 832 + Round = 833 + Log2 = 834 + Sin = 835 + Cos = 836 + Shl = 837 + Shr = 838 + Ext = 839 + Sxt = 840 + Find_Leftmost = 841 + Find_Rightmost = 842 + Last_Ieee_Name = 842 + First_Synthesis = 843 + Allconst = 843 + Allseq = 844 + Anyconst = 845 + Anyseq = 846 + Last_Synthesis = 846 + First_Directive = 847 + Define = 847 + Endif = 848 + Ifdef = 849 + Ifndef = 850 + Include = 851 + Timescale = 852 + Undef = 853 + Protect = 854 + Begin_Protected = 855 + End_Protected = 856 + Key_Block = 857 + Data_Block = 858 + Line = 859 + Celldefine = 860 + Endcelldefine = 861 + Default_Nettype = 862 + Resetall = 863 + Last_Directive = 863 + First_Systask = 864 + Bits = 864 + D_Root = 865 + D_Unit = 866 + Last_Systask = 866 + First_SV_Method = 867 + Size = 867 + Insert = 868 + Delete = 869 + Pop_Front = 870 + Pop_Back = 871 + Push_Front = 872 + Push_Back = 873 + Name = 874 + Len = 875 + Substr = 876 + Exists = 877 + Atoi = 878 + Itoa = 879 + Find = 880 + Find_Index = 881 + Find_First = 882 + Find_First_Index = 883 + Find_Last = 884 + Find_Last_Index = 885 + Num = 886 + Randomize = 887 + Pre_Randomize = 888 + Post_Randomize = 889 + Srandom = 890 + Get_Randstate = 891 + Set_Randstate = 892 + Seed = 893 + State = 894 + Last_SV_Method = 894 + First_BSV = 895 + uAction = 895 + uActionValue = 896 + BVI = 897 + uC = 898 + uCF = 899 + uE = 900 + uSB = 901 + uSBR = 902 + Action = 903 + Endaction = 904 + Actionvalue = 905 + Endactionvalue = 906 + Ancestor = 907 + Clocked_By = 908 + Default_Clock = 909 + Default_Reset = 910 + Dependencies = 911 + Deriving = 912 + Determines = 913 + Enable = 914 + Ifc_Inout = 915 + Input_Clock = 916 + Input_Reset = 917 + Instance = 918 + Endinstance = 919 + Let = 920 + Match = 921 + Method = 922 + Endmethod = 923 + Numeric = 924 + Output_Clock = 925 + Output_Reset = 926 + Par = 927 + Endpar = 928 + Path = 929 + Provisos = 930 + Ready = 931 + Reset_By = 932 + Rule = 933 + Endrule = 934 + Rules = 935 + Endrules = 936 + Same_Family = 937 + Schedule = 938 + Seq = 939 + Endseq = 940 + Typeclass = 941 + Endtypeclass = 942 + Valueof = 943 + uValueof = 944 + Last_BSV = 944 + First_Comment = 945 + Psl = 945 + Pragma = 946 + Synthesis = 947 + Synopsys = 948 + Translate_Off = 949 + Translate_On = 950 + Translate = 951 + Synthesis_Off = 952 + Synthesis_On = 953 + Off = 954 + Last_Comment = 954 + First_PSL = 955 + A = 955 + Af = 956 + Ag = 957 + Ax = 958 + Abort = 959 + Assume_Guarantee = 960 + Before = 961 + Clock = 962 + E = 963 + Ef = 964 + Eg = 965 + Ex = 966 + Endpoint = 967 + Eventually = 968 + Fairness = 969 + Fell = 970 + Forall = 971 + G = 972 + Inf = 973 + Inherit = 974 + Never = 975 + Next_A = 976 + Next_E = 977 + Next_Event = 978 + Next_Event_A = 979 + Next_Event_E = 980 + Prev = 981 + Rose = 982 + Strong = 983 + W = 984 + Whilenot = 985 + Within = 986 + X = 987 + Last_PSL = 987 + First_Edif = 988 + Celltype = 998 + View = 999 + Viewtype = 1000 + Direction = 1001 + Contents = 1002 + Net = 1003 + Viewref = 1004 + Cellref = 1005 + Libraryref = 1006 + Portinstance = 1007 + Joined = 1008 + Portref = 1009 + Instanceref = 1010 + Design = 1011 + Designator = 1012 + Owner = 1013 + Member = 1014 + Number = 1015 + Rename = 1016 + Userdata = 1017 + Last_Edif = 1017 diff --git a/pyGHDL/libghdl/vhdl/nodes.py b/pyGHDL/libghdl/vhdl/nodes.py index b4e5304e6..759bad8d4 100644 --- a/pyGHDL/libghdl/vhdl/nodes.py +++ b/pyGHDL/libghdl/vhdl/nodes.py @@ -1506,222 +1506,223 @@ class Iir_Predefined: Ieee_Numeric_Std_Match_Suv = 434 Ieee_Numeric_Std_To_01_Uns = 435 Ieee_Numeric_Std_To_01_Sgn = 436 - Ieee_Math_Real_Ceil = 437 - Ieee_Math_Real_Floor = 438 - Ieee_Math_Real_Round = 439 - Ieee_Math_Real_Log2 = 440 - Ieee_Math_Real_Sin = 441 - Ieee_Math_Real_Cos = 442 - Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 443 - Ieee_Std_Logic_Unsigned_Add_Slv_Int = 444 - Ieee_Std_Logic_Unsigned_Add_Int_Slv = 445 - Ieee_Std_Logic_Unsigned_Add_Slv_Log = 446 - Ieee_Std_Logic_Unsigned_Add_Log_Slv = 447 - Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 448 - Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 449 - Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 450 - Ieee_Std_Logic_Unsigned_Sub_Slv_Log = 451 - Ieee_Std_Logic_Unsigned_Sub_Log_Slv = 452 - Ieee_Std_Logic_Unsigned_Id_Slv = 453 - Ieee_Std_Logic_Unsigned_Mul_Slv_Slv = 454 - Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 455 - Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 456 - Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 457 - Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 458 - Ieee_Std_Logic_Unsigned_Le_Slv_Int = 459 - Ieee_Std_Logic_Unsigned_Le_Int_Slv = 460 - Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 461 - Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 462 - Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 463 - Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 464 - Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 465 - Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 466 - Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 467 - Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 468 - Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 469 - Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 470 - Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 471 - Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 472 - Ieee_Std_Logic_Unsigned_Conv_Integer = 473 - Ieee_Std_Logic_Unsigned_Shl = 474 - Ieee_Std_Logic_Unsigned_Shr = 475 - Ieee_Std_Logic_Signed_Add_Slv_Slv = 476 - Ieee_Std_Logic_Signed_Add_Slv_Int = 477 - Ieee_Std_Logic_Signed_Add_Int_Slv = 478 - Ieee_Std_Logic_Signed_Add_Slv_Log = 479 - Ieee_Std_Logic_Signed_Add_Log_Slv = 480 - Ieee_Std_Logic_Signed_Sub_Slv_Slv = 481 - Ieee_Std_Logic_Signed_Sub_Slv_Int = 482 - Ieee_Std_Logic_Signed_Sub_Int_Slv = 483 - Ieee_Std_Logic_Signed_Sub_Slv_Log = 484 - Ieee_Std_Logic_Signed_Sub_Log_Slv = 485 - Ieee_Std_Logic_Signed_Id_Slv = 486 - Ieee_Std_Logic_Signed_Neg_Slv = 487 - Ieee_Std_Logic_Signed_Abs_Slv = 488 - Ieee_Std_Logic_Signed_Mul_Slv_Slv = 489 - Ieee_Std_Logic_Signed_Lt_Slv_Slv = 490 - Ieee_Std_Logic_Signed_Lt_Slv_Int = 491 - Ieee_Std_Logic_Signed_Lt_Int_Slv = 492 - Ieee_Std_Logic_Signed_Le_Slv_Slv = 493 - Ieee_Std_Logic_Signed_Le_Slv_Int = 494 - Ieee_Std_Logic_Signed_Le_Int_Slv = 495 - Ieee_Std_Logic_Signed_Gt_Slv_Slv = 496 - Ieee_Std_Logic_Signed_Gt_Slv_Int = 497 - Ieee_Std_Logic_Signed_Gt_Int_Slv = 498 - Ieee_Std_Logic_Signed_Ge_Slv_Slv = 499 - Ieee_Std_Logic_Signed_Ge_Slv_Int = 500 - Ieee_Std_Logic_Signed_Ge_Int_Slv = 501 - Ieee_Std_Logic_Signed_Eq_Slv_Slv = 502 - Ieee_Std_Logic_Signed_Eq_Slv_Int = 503 - Ieee_Std_Logic_Signed_Eq_Int_Slv = 504 - Ieee_Std_Logic_Signed_Ne_Slv_Slv = 505 - Ieee_Std_Logic_Signed_Ne_Slv_Int = 506 - Ieee_Std_Logic_Signed_Ne_Int_Slv = 507 - Ieee_Std_Logic_Signed_Conv_Integer = 508 - Ieee_Std_Logic_Signed_Shl = 509 - Ieee_Std_Logic_Signed_Shr = 510 - Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 511 - Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 512 - Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 513 - Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 514 - Ieee_Std_Logic_Arith_Conv_Integer_Int = 515 - Ieee_Std_Logic_Arith_Conv_Integer_Uns = 516 - Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 517 - Ieee_Std_Logic_Arith_Conv_Integer_Log = 518 - Ieee_Std_Logic_Arith_Conv_Vector_Int = 519 - Ieee_Std_Logic_Arith_Conv_Vector_Uns = 520 - Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 521 - Ieee_Std_Logic_Arith_Conv_Vector_Log = 522 - Ieee_Std_Logic_Arith_Ext = 523 - Ieee_Std_Logic_Arith_Sxt = 524 - Ieee_Std_Logic_Arith_Id_Uns_Uns = 525 - Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 526 - Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 527 - Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 528 - Ieee_Std_Logic_Arith_Shl_Uns = 529 - Ieee_Std_Logic_Arith_Shl_Sgn = 530 - Ieee_Std_Logic_Arith_Shr_Uns = 531 - Ieee_Std_Logic_Arith_Shr_Sgn = 532 - Ieee_Std_Logic_Arith_Id_Uns_Slv = 533 - Ieee_Std_Logic_Arith_Id_Sgn_Slv = 534 - Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 535 - Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 536 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 537 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 538 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 539 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 540 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 541 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 542 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 543 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 544 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 545 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 546 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 547 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 548 - Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 549 - Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 550 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 551 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 552 - Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 553 - Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 554 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 555 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 556 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 557 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 558 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 559 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 560 - Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 561 - Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 562 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 563 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 564 - Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 565 - Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 566 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 567 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 568 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 569 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 570 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 571 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 572 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 573 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 574 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 575 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 576 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 577 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 578 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 579 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 580 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 581 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 582 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 583 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 584 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 585 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 586 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 587 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 588 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 589 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 590 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 591 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 592 - Ieee_Std_Logic_Arith_Lt_Uns_Uns = 593 - Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 594 - Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 595 - Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 596 - Ieee_Std_Logic_Arith_Lt_Uns_Int = 597 - Ieee_Std_Logic_Arith_Lt_Int_Uns = 598 - Ieee_Std_Logic_Arith_Lt_Sgn_Int = 599 - Ieee_Std_Logic_Arith_Lt_Int_Sgn = 600 - Ieee_Std_Logic_Arith_Le_Uns_Uns = 601 - Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 602 - Ieee_Std_Logic_Arith_Le_Uns_Sgn = 603 - Ieee_Std_Logic_Arith_Le_Sgn_Uns = 604 - Ieee_Std_Logic_Arith_Le_Uns_Int = 605 - Ieee_Std_Logic_Arith_Le_Int_Uns = 606 - Ieee_Std_Logic_Arith_Le_Sgn_Int = 607 - Ieee_Std_Logic_Arith_Le_Int_Sgn = 608 - Ieee_Std_Logic_Arith_Gt_Uns_Uns = 609 - Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 610 - Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 611 - Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 612 - Ieee_Std_Logic_Arith_Gt_Uns_Int = 613 - Ieee_Std_Logic_Arith_Gt_Int_Uns = 614 - Ieee_Std_Logic_Arith_Gt_Sgn_Int = 615 - Ieee_Std_Logic_Arith_Gt_Int_Sgn = 616 - Ieee_Std_Logic_Arith_Ge_Uns_Uns = 617 - Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 618 - Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 619 - Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 620 - Ieee_Std_Logic_Arith_Ge_Uns_Int = 621 - Ieee_Std_Logic_Arith_Ge_Int_Uns = 622 - Ieee_Std_Logic_Arith_Ge_Sgn_Int = 623 - Ieee_Std_Logic_Arith_Ge_Int_Sgn = 624 - Ieee_Std_Logic_Arith_Eq_Uns_Uns = 625 - Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 626 - Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 627 - Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 628 - Ieee_Std_Logic_Arith_Eq_Uns_Int = 629 - Ieee_Std_Logic_Arith_Eq_Int_Uns = 630 - Ieee_Std_Logic_Arith_Eq_Sgn_Int = 631 - Ieee_Std_Logic_Arith_Eq_Int_Sgn = 632 - Ieee_Std_Logic_Arith_Ne_Uns_Uns = 633 - Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 634 - Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 635 - Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 636 - Ieee_Std_Logic_Arith_Ne_Uns_Int = 637 - Ieee_Std_Logic_Arith_Ne_Int_Uns = 638 - Ieee_Std_Logic_Arith_Ne_Sgn_Int = 639 - Ieee_Std_Logic_Arith_Ne_Int_Sgn = 640 - Ieee_Std_Logic_Misc_And_Reduce_Slv = 641 - Ieee_Std_Logic_Misc_And_Reduce_Suv = 642 - Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 643 - Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 644 - Ieee_Std_Logic_Misc_Or_Reduce_Slv = 645 - Ieee_Std_Logic_Misc_Or_Reduce_Suv = 646 - Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 647 - Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 648 - Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 649 - Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 650 - Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 651 - Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 652 + Ieee_Numeric_Std_Unsigned_To_Integer_Slv_Nat = 437 + Ieee_Math_Real_Ceil = 438 + Ieee_Math_Real_Floor = 439 + Ieee_Math_Real_Round = 440 + Ieee_Math_Real_Log2 = 441 + Ieee_Math_Real_Sin = 442 + Ieee_Math_Real_Cos = 443 + Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 444 + Ieee_Std_Logic_Unsigned_Add_Slv_Int = 445 + Ieee_Std_Logic_Unsigned_Add_Int_Slv = 446 + Ieee_Std_Logic_Unsigned_Add_Slv_Log = 447 + Ieee_Std_Logic_Unsigned_Add_Log_Slv = 448 + Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 449 + Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 450 + Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 451 + Ieee_Std_Logic_Unsigned_Sub_Slv_Log = 452 + Ieee_Std_Logic_Unsigned_Sub_Log_Slv = 453 + Ieee_Std_Logic_Unsigned_Id_Slv = 454 + Ieee_Std_Logic_Unsigned_Mul_Slv_Slv = 455 + Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 456 + Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 457 + Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 458 + Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 459 + Ieee_Std_Logic_Unsigned_Le_Slv_Int = 460 + Ieee_Std_Logic_Unsigned_Le_Int_Slv = 461 + Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 462 + Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 463 + Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 464 + Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 465 + Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 466 + Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 467 + Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 468 + Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 469 + Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 470 + Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 471 + Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 472 + Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 473 + Ieee_Std_Logic_Unsigned_Conv_Integer = 474 + Ieee_Std_Logic_Unsigned_Shl = 475 + Ieee_Std_Logic_Unsigned_Shr = 476 + Ieee_Std_Logic_Signed_Add_Slv_Slv = 477 + Ieee_Std_Logic_Signed_Add_Slv_Int = 478 + Ieee_Std_Logic_Signed_Add_Int_Slv = 479 + Ieee_Std_Logic_Signed_Add_Slv_Log = 480 + Ieee_Std_Logic_Signed_Add_Log_Slv = 481 + Ieee_Std_Logic_Signed_Sub_Slv_Slv = 482 + Ieee_Std_Logic_Signed_Sub_Slv_Int = 483 + Ieee_Std_Logic_Signed_Sub_Int_Slv = 484 + Ieee_Std_Logic_Signed_Sub_Slv_Log = 485 + Ieee_Std_Logic_Signed_Sub_Log_Slv = 486 + Ieee_Std_Logic_Signed_Id_Slv = 487 + Ieee_Std_Logic_Signed_Neg_Slv = 488 + Ieee_Std_Logic_Signed_Abs_Slv = 489 + Ieee_Std_Logic_Signed_Mul_Slv_Slv = 490 + Ieee_Std_Logic_Signed_Lt_Slv_Slv = 491 + Ieee_Std_Logic_Signed_Lt_Slv_Int = 492 + Ieee_Std_Logic_Signed_Lt_Int_Slv = 493 + Ieee_Std_Logic_Signed_Le_Slv_Slv = 494 + Ieee_Std_Logic_Signed_Le_Slv_Int = 495 + Ieee_Std_Logic_Signed_Le_Int_Slv = 496 + Ieee_Std_Logic_Signed_Gt_Slv_Slv = 497 + Ieee_Std_Logic_Signed_Gt_Slv_Int = 498 + Ieee_Std_Logic_Signed_Gt_Int_Slv = 499 + Ieee_Std_Logic_Signed_Ge_Slv_Slv = 500 + Ieee_Std_Logic_Signed_Ge_Slv_Int = 501 + Ieee_Std_Logic_Signed_Ge_Int_Slv = 502 + Ieee_Std_Logic_Signed_Eq_Slv_Slv = 503 + Ieee_Std_Logic_Signed_Eq_Slv_Int = 504 + Ieee_Std_Logic_Signed_Eq_Int_Slv = 505 + Ieee_Std_Logic_Signed_Ne_Slv_Slv = 506 + Ieee_Std_Logic_Signed_Ne_Slv_Int = 507 + Ieee_Std_Logic_Signed_Ne_Int_Slv = 508 + Ieee_Std_Logic_Signed_Conv_Integer = 509 + Ieee_Std_Logic_Signed_Shl = 510 + Ieee_Std_Logic_Signed_Shr = 511 + Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 512 + Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 513 + Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 514 + Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 515 + Ieee_Std_Logic_Arith_Conv_Integer_Int = 516 + Ieee_Std_Logic_Arith_Conv_Integer_Uns = 517 + Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 518 + Ieee_Std_Logic_Arith_Conv_Integer_Log = 519 + Ieee_Std_Logic_Arith_Conv_Vector_Int = 520 + Ieee_Std_Logic_Arith_Conv_Vector_Uns = 521 + Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 522 + Ieee_Std_Logic_Arith_Conv_Vector_Log = 523 + Ieee_Std_Logic_Arith_Ext = 524 + Ieee_Std_Logic_Arith_Sxt = 525 + Ieee_Std_Logic_Arith_Id_Uns_Uns = 526 + Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 527 + Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 528 + Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 529 + Ieee_Std_Logic_Arith_Shl_Uns = 530 + Ieee_Std_Logic_Arith_Shl_Sgn = 531 + Ieee_Std_Logic_Arith_Shr_Uns = 532 + Ieee_Std_Logic_Arith_Shr_Sgn = 533 + Ieee_Std_Logic_Arith_Id_Uns_Slv = 534 + Ieee_Std_Logic_Arith_Id_Sgn_Slv = 535 + Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 536 + Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 537 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 538 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 539 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 540 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 541 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 542 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 543 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 544 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 545 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 546 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 547 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 548 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 549 + Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 550 + Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 551 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 552 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 553 + Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 554 + Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 555 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 556 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 557 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 558 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 559 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 560 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 561 + Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 562 + Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 563 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 564 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 565 + Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 566 + Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 567 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 568 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 569 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 570 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 571 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 572 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 573 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 574 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 575 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 576 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 577 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 578 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 579 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 580 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 581 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 582 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 583 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 584 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 585 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 586 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 587 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 588 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 589 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 590 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 591 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 592 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 593 + Ieee_Std_Logic_Arith_Lt_Uns_Uns = 594 + Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 595 + Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 596 + Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 597 + Ieee_Std_Logic_Arith_Lt_Uns_Int = 598 + Ieee_Std_Logic_Arith_Lt_Int_Uns = 599 + Ieee_Std_Logic_Arith_Lt_Sgn_Int = 600 + Ieee_Std_Logic_Arith_Lt_Int_Sgn = 601 + Ieee_Std_Logic_Arith_Le_Uns_Uns = 602 + Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 603 + Ieee_Std_Logic_Arith_Le_Uns_Sgn = 604 + Ieee_Std_Logic_Arith_Le_Sgn_Uns = 605 + Ieee_Std_Logic_Arith_Le_Uns_Int = 606 + Ieee_Std_Logic_Arith_Le_Int_Uns = 607 + Ieee_Std_Logic_Arith_Le_Sgn_Int = 608 + Ieee_Std_Logic_Arith_Le_Int_Sgn = 609 + Ieee_Std_Logic_Arith_Gt_Uns_Uns = 610 + Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 611 + Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 612 + Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 613 + Ieee_Std_Logic_Arith_Gt_Uns_Int = 614 + Ieee_Std_Logic_Arith_Gt_Int_Uns = 615 + Ieee_Std_Logic_Arith_Gt_Sgn_Int = 616 + Ieee_Std_Logic_Arith_Gt_Int_Sgn = 617 + Ieee_Std_Logic_Arith_Ge_Uns_Uns = 618 + Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 619 + Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 620 + Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 621 + Ieee_Std_Logic_Arith_Ge_Uns_Int = 622 + Ieee_Std_Logic_Arith_Ge_Int_Uns = 623 + Ieee_Std_Logic_Arith_Ge_Sgn_Int = 624 + Ieee_Std_Logic_Arith_Ge_Int_Sgn = 625 + Ieee_Std_Logic_Arith_Eq_Uns_Uns = 626 + Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 627 + Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 628 + Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 629 + Ieee_Std_Logic_Arith_Eq_Uns_Int = 630 + Ieee_Std_Logic_Arith_Eq_Int_Uns = 631 + Ieee_Std_Logic_Arith_Eq_Sgn_Int = 632 + Ieee_Std_Logic_Arith_Eq_Int_Sgn = 633 + Ieee_Std_Logic_Arith_Ne_Uns_Uns = 634 + Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 635 + Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 636 + Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 637 + Ieee_Std_Logic_Arith_Ne_Uns_Int = 638 + Ieee_Std_Logic_Arith_Ne_Int_Uns = 639 + Ieee_Std_Logic_Arith_Ne_Sgn_Int = 640 + Ieee_Std_Logic_Arith_Ne_Int_Sgn = 641 + Ieee_Std_Logic_Misc_And_Reduce_Slv = 642 + Ieee_Std_Logic_Misc_And_Reduce_Suv = 643 + Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 644 + Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 645 + Ieee_Std_Logic_Misc_Or_Reduce_Slv = 646 + Ieee_Std_Logic_Misc_Or_Reduce_Suv = 647 + Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 648 + Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 649 + Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 650 + Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 651 + Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 652 + Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 653 Get_Kind = libghdl.vhdl__nodes__get_kind Get_Location = libghdl.vhdl__nodes__get_location diff --git a/src/std_names.adb b/src/std_names.adb index 0545fdbaa..e98df740a 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -615,17 +615,18 @@ package body Std_Names is Def ("built_in", Name_Built_In); Def ("none", Name_None); - Def ("ieee", Name_Ieee); - Def ("std_logic_1164", Name_Std_Logic_1164); - Def ("vital_timing", Name_VITAL_Timing); - Def ("numeric_std", Name_Numeric_Std); - Def ("numeric_bit", Name_Numeric_Bit); - Def ("std_logic_arith", Name_Std_Logic_Arith); - Def ("std_logic_signed", Name_Std_Logic_Signed); - Def ("std_logic_unsigned", Name_Std_Logic_Unsigned); - Def ("std_logic_textio", Name_Std_Logic_Textio); - Def ("std_logic_misc", Name_Std_Logic_Misc); - Def ("math_real", Name_Math_Real); + Def ("ieee", Name_Ieee); + Def ("std_logic_1164", Name_Std_Logic_1164); + Def ("vital_timing", Name_VITAL_Timing); + Def ("numeric_std", Name_Numeric_Std); + Def ("numeric_bit", Name_Numeric_Bit); + Def ("numeric_std_unsigned", Name_Numeric_Std_Unsigned); + Def ("std_logic_arith", Name_Std_Logic_Arith); + Def ("std_logic_signed", Name_Std_Logic_Signed); + Def ("std_logic_unsigned", Name_Std_Logic_Unsigned); + Def ("std_logic_textio", Name_Std_Logic_Textio); + Def ("std_logic_misc", Name_Std_Logic_Misc); + Def ("math_real", Name_Math_Real); Def ("std_ulogic", Name_Std_Ulogic); Def ("std_ulogic_vector", Name_Std_Ulogic_Vector); diff --git a/src/std_names.ads b/src/std_names.ads index 0d8950171..90ad19fe6 100644 --- a/src/std_names.ads +++ b/src/std_names.ads @@ -695,19 +695,20 @@ package Std_Names is Name_None : constant Name_Id := Name_First_Misc + 041; Name_Last_Misc : constant Name_Id := Name_None; - Name_First_Ieee_Pkg : constant Name_Id := Name_Last_Misc + 1; - Name_Ieee : constant Name_Id := Name_First_Ieee_Pkg + 000; - Name_Std_Logic_1164 : constant Name_Id := Name_First_Ieee_Pkg + 001; - Name_VITAL_Timing : constant Name_Id := Name_First_Ieee_Pkg + 002; - Name_Numeric_Std : constant Name_Id := Name_First_Ieee_Pkg + 003; - Name_Numeric_Bit : constant Name_Id := Name_First_Ieee_Pkg + 004; - Name_Std_Logic_Arith : constant Name_Id := Name_First_Ieee_Pkg + 005; - Name_Std_Logic_Signed : constant Name_Id := Name_First_Ieee_Pkg + 006; - Name_Std_Logic_Unsigned : constant Name_Id := Name_First_Ieee_Pkg + 007; - Name_Std_Logic_Textio : constant Name_Id := Name_First_Ieee_Pkg + 008; - Name_Std_Logic_Misc : constant Name_Id := Name_First_Ieee_Pkg + 009; - Name_Math_Real : constant Name_Id := Name_First_Ieee_Pkg + 010; - Name_Last_Ieee_Pkg : constant Name_Id := Name_Math_Real; + Name_First_Ieee_Pkg : constant Name_Id := Name_Last_Misc + 1; + Name_Ieee : constant Name_Id := Name_First_Ieee_Pkg + 000; + Name_Std_Logic_1164 : constant Name_Id := Name_First_Ieee_Pkg + 001; + Name_VITAL_Timing : constant Name_Id := Name_First_Ieee_Pkg + 002; + Name_Numeric_Std : constant Name_Id := Name_First_Ieee_Pkg + 003; + Name_Numeric_Bit : constant Name_Id := Name_First_Ieee_Pkg + 004; + Name_Numeric_Std_Unsigned : constant Name_Id := Name_First_Ieee_Pkg + 005; + Name_Std_Logic_Arith : constant Name_Id := Name_First_Ieee_Pkg + 006; + Name_Std_Logic_Signed : constant Name_Id := Name_First_Ieee_Pkg + 007; + Name_Std_Logic_Unsigned : constant Name_Id := Name_First_Ieee_Pkg + 008; + Name_Std_Logic_Textio : constant Name_Id := Name_First_Ieee_Pkg + 009; + Name_Std_Logic_Misc : constant Name_Id := Name_First_Ieee_Pkg + 010; + Name_Math_Real : constant Name_Id := Name_First_Ieee_Pkg + 011; + Name_Last_Ieee_Pkg : constant Name_Id := Name_Math_Real; Name_First_Ieee_Name : constant Name_Id := Name_Last_Ieee_Pkg + 1; Name_Std_Ulogic : constant Name_Id := Name_First_Ieee_Name + 000; diff --git a/src/vhdl/vhdl-ieee-numeric_std_unsigned.adb b/src/vhdl/vhdl-ieee-numeric_std_unsigned.adb new file mode 100644 index 000000000..16450f5a6 --- /dev/null +++ b/src/vhdl/vhdl-ieee-numeric_std_unsigned.adb @@ -0,0 +1,105 @@ +-- Nodes recognizer for ieee.std_logic_unsigned and ieee.std_logic_signed +-- Copyright (C) 2021 Tristan Gingold +-- +-- GHDL is free software; you can redistribute it and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation; either version 2, or (at your option) any later +-- version. +-- +-- GHDL is distributed in the hope that it will be useful, but WITHOUT ANY +-- WARRANTY; without even the implied warranty of MERCHANTABILITY or +-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with GHDL; see the file COPYING. If not, write to the Free +-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA +-- 02111-1307, USA. + +with Vhdl.Std_Package; +with Std_Names; use Std_Names; +with Vhdl.Ieee.Std_Logic_1164; +with Vhdl.Errors; + +package body Vhdl.Ieee.Numeric_Std_Unsigned is + type Arg_Kind is (Arg_Slv, Arg_Int, Arg_Log); + + Error : exception; + + procedure Classify_Arg (Arg : Iir; Kind : out Arg_Kind) + is + Arg_Type : constant Iir := Get_Type (Arg); + begin + if Arg_Type = Vhdl.Std_Package.Integer_Subtype_Definition + or else Arg_Type = Vhdl.Std_Package.Natural_Subtype_Definition + then + Kind := Arg_Int; + elsif Arg_Type = Ieee.Std_Logic_1164.Std_Logic_Type + or else Arg_Type = Ieee.Std_Logic_1164.Std_Ulogic_Type + then + Kind := Arg_Log; + elsif Arg_Type = Ieee.Std_Logic_1164.Std_Logic_Vector_Type + or else Arg_Type = Ieee.Std_Logic_1164.Std_Ulogic_Vector_Type + then + Kind := Arg_Slv; + else + raise Error; + end if; + end Classify_Arg; + + procedure Extract_Declaration (Decl : Iir) + is + Arg1, Arg2 : Iir; + Arg1_Kind : Arg_Kind; + Res : Iir_Predefined_Functions; + begin + Arg1 := Get_Interface_Declaration_Chain (Decl); + if Is_Null (Arg1) then + raise Error; + end if; + + Res := Iir_Predefined_None; + + Classify_Arg (Arg1, Arg1_Kind); + Arg2 := Get_Chain (Arg1); + if Is_Valid (Arg2) then + -- Dyadic function. + null; + else + -- Monadic function. + case Get_Identifier (Decl) is + when Name_To_Integer => + pragma Assert (Arg1_Kind = Arg_Slv); + Res := + Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Integer_Slv_Nat; + when others => + null; + end case; + end if; + Set_Implicit_Definition (Decl, Res); + end Extract_Declaration; + + procedure Extract_Declarations (Pkg : Iir_Package_Declaration) + is + Decl : Iir; + begin + Decl := Get_Declaration_Chain (Pkg); + + Decl := Skip_Copyright_Notice (Decl); + + -- Handle functions. + while Is_Valid (Decl) loop + case Get_Kind (Decl) is + when Iir_Kind_Function_Declaration => + Extract_Declaration (Decl); + when Iir_Kind_Non_Object_Alias_Declaration => + null; + when others => + Vhdl.Errors.Error_Kind ("extract_declarations", Decl); + raise Error; + end case; + + Decl := Get_Chain (Decl); + end loop; + end Extract_Declarations; +end Vhdl.Ieee.Numeric_Std_Unsigned; diff --git a/src/vhdl/vhdl-ieee-numeric_std_unsigned.ads b/src/vhdl/vhdl-ieee-numeric_std_unsigned.ads new file mode 100644 index 000000000..f90eb5c7a --- /dev/null +++ b/src/vhdl/vhdl-ieee-numeric_std_unsigned.ads @@ -0,0 +1,22 @@ +-- Nodes recognizer for ieee.std_logic_unsigned and ieee.std_logic_signed. +-- Copyright (C) 2021 Tristan Gingold +-- +-- GHDL is free software; you can redistribute it and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation; either version 2, or (at your option) any later +-- version. +-- +-- GHDL is distributed in the hope that it will be useful, but WITHOUT ANY +-- WARRANTY; without even the implied warranty of MERCHANTABILITY or +-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with GHDL; see the file COPYING. If not, write to the Free +-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA +-- 02111-1307, USA. + +package Vhdl.Ieee.Numeric_Std_Unsigned is + -- Extract declarations from PKG . + procedure Extract_Declarations (Pkg : Iir_Package_Declaration); +end Vhdl.Ieee.Numeric_Std_Unsigned; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 855dccebd..f092fd598 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5873,6 +5873,9 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_To_01_Uns, Iir_Predefined_Ieee_Numeric_Std_To_01_Sgn, + -- Numeric_Std_Unsigned (ieee2008) + Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Integer_Slv_Nat, + -- Math_Real Iir_Predefined_Ieee_Math_Real_Ceil, Iir_Predefined_Ieee_Math_Real_Floor, diff --git a/src/vhdl/vhdl-post_sems.adb b/src/vhdl/vhdl-post_sems.adb index 5477a3136..c21c1b3d1 100644 --- a/src/vhdl/vhdl-post_sems.adb +++ b/src/vhdl/vhdl-post_sems.adb @@ -21,6 +21,7 @@ with Vhdl.Sem_Specs; with Vhdl.Ieee.Std_Logic_1164; with Vhdl.Ieee.Vital_Timing; with Vhdl.Ieee.Numeric; +with Vhdl.Ieee.Numeric_Std_Unsigned; with Vhdl.Ieee.Math_Real; with Vhdl.Ieee.Std_Logic_Unsigned; with Vhdl.Ieee.Std_Logic_Arith; @@ -60,7 +61,11 @@ package body Vhdl.Post_Sems is when Name_VITAL_Timing => Vhdl.Ieee.Vital_Timing.Extract_Declarations (Lib_Unit); when Name_Numeric_Std => - Vhdl.Ieee.Numeric.Extract_Std_Declarations (Lib_Unit); + Vhdl.Ieee.Numeric.Extract_Std_Declarations + (Lib_Unit); + when Name_Numeric_Std_Unsigned => + Vhdl.Ieee.Numeric_Std_Unsigned.Extract_Declarations + (Lib_Unit); when Name_Math_Real => Vhdl.Ieee.Math_Real.Extract_Declarations (Lib_Unit); when Name_Std_Logic_Unsigned => |