diff options
| -rw-r--r-- | testsuite/sanity/004all08/all08.vhdl | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/testsuite/sanity/004all08/all08.vhdl b/testsuite/sanity/004all08/all08.vhdl index d36eed366..4a47baddd 100644 --- a/testsuite/sanity/004all08/all08.vhdl +++ b/testsuite/sanity/004all08/all08.vhdl @@ -273,6 +273,7 @@ architecture behav of reg_tb is signal s1 : std_logic; signal si : integer; + signal si2 : integer; alias my_clk : std_logic is clk; @@ -307,6 +308,9 @@ begin rst_n <= '0', '1' after 25 ns; + si2 <= 1 when rst_n = '0' else + 2 when rst_n = '1'; + cmpz0 : check_zero port map (i0 => din (0)); cmpz1 : check_zero port map (i0 => din (1)); cmpz2 : check_zero port map (i0 => din (2)); |