diff options
-rw-r--r-- | python/libghdl/thin/std_names.py | 344 | ||||
-rw-r--r-- | python/libghdl/thin/vhdl/nodes.py | 96 | ||||
-rw-r--r-- | src/std_names.adb | 2 | ||||
-rw-r--r-- | src/std_names.ads | 8 | ||||
-rw-r--r-- | src/vhdl/vhdl-ieee-numeric.adb | 12 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes.ads | 5 |
6 files changed, 247 insertions, 220 deletions
diff --git a/python/libghdl/thin/std_names.py b/python/libghdl/thin/std_names.py index 9b3fa32be..5fccc6d0a 100644 --- a/python/libghdl/thin/std_names.py +++ b/python/libghdl/thin/std_names.py @@ -592,174 +592,176 @@ class Name: Std_Match = 806 Shift_Left = 807 Shift_Right = 808 - Math_Real = 809 - Ceil = 810 - Log2 = 811 - Last_Ieee = 811 - First_Directive = 812 - Define = 812 - Endif = 813 - Ifdef = 814 - Ifndef = 815 - Include = 816 - Timescale = 817 - Undef = 818 - Protect = 819 - Begin_Protected = 820 - End_Protected = 821 - Key_Block = 822 - Data_Block = 823 - Line = 824 - Celldefine = 825 - Endcelldefine = 826 - Default_Nettype = 827 - Resetall = 828 - Last_Directive = 828 - First_Systask = 829 - Bits = 829 - D_Root = 830 - D_Unit = 831 - Last_Systask = 831 - First_SV_Method = 832 - Size = 832 - Insert = 833 - Delete = 834 - Pop_Front = 835 - Pop_Back = 836 - Push_Front = 837 - Push_Back = 838 - Name = 839 - Len = 840 - Substr = 841 - Exists = 842 - Atoi = 843 - Itoa = 844 - Find = 845 - Find_Index = 846 - Find_First = 847 - Find_First_Index = 848 - Find_Last = 849 - Find_Last_Index = 850 - Num = 851 - Randomize = 852 - Pre_Randomize = 853 - Post_Randomize = 854 - Srandom = 855 - Get_Randstate = 856 - Set_Randstate = 857 - Seed = 858 - State = 859 - Last_SV_Method = 859 - First_BSV = 860 - uAction = 860 - uActionValue = 861 - BVI = 862 - uC = 863 - uCF = 864 - uE = 865 - uSB = 866 - uSBR = 867 - Action = 868 - Endaction = 869 - Actionvalue = 870 - Endactionvalue = 871 - Ancestor = 872 - Clocked_By = 873 - Default_Clock = 874 - Default_Reset = 875 - Dependencies = 876 - Deriving = 877 - Determines = 878 - Enable = 879 - Ifc_Inout = 880 - Input_Clock = 881 - Input_Reset = 882 - Instance = 883 - Endinstance = 884 - Let = 885 - Match = 886 - Method = 887 - Endmethod = 888 - Numeric = 889 - Output_Clock = 890 - Output_Reset = 891 - Par = 892 - Endpar = 893 - Path = 894 - Provisos = 895 - Ready = 896 - Reset_By = 897 - Rule = 898 - Endrule = 899 - Rules = 900 - Endrules = 901 - Same_Family = 902 - Schedule = 903 - Seq = 904 - Endseq = 905 - Typeclass = 906 - Endtypeclass = 907 - Valueof = 908 - uValueof = 909 - Last_BSV = 909 - First_Comment = 910 - Psl = 910 - Pragma = 911 - Last_Comment = 911 - First_PSL = 912 - A = 912 - Af = 913 - Ag = 914 - Ax = 915 - Abort = 916 - Assume_Guarantee = 917 - Before = 918 - Clock = 919 - E = 920 - Ef = 921 - Eg = 922 - Ex = 923 - Endpoint = 924 - Eventually = 925 - Fairness = 926 - Fell = 927 - Forall = 928 - G = 929 - Inf = 930 - Inherit = 931 - Never = 932 - Next_A = 933 - Next_E = 934 - Next_Event = 935 - Next_Event_A = 936 - Next_Event_E = 937 - Prev = 938 - Rose = 939 - Strong = 940 - W = 941 - Whilenot = 942 - Within = 943 - X = 944 - Last_PSL = 944 - First_Edif = 945 - Celltype = 955 - View = 956 - Viewtype = 957 - Direction = 958 - Contents = 959 - Net = 960 - Viewref = 961 - Cellref = 962 - Libraryref = 963 - Portinstance = 964 - Joined = 965 - Portref = 966 - Instanceref = 967 - Design = 968 - Designator = 969 - Owner = 970 - Member = 971 - Number = 972 - Rename = 973 - Userdata = 974 - Last_Edif = 974 + Rotate_Left = 809 + Rotate_Right = 810 + Math_Real = 811 + Ceil = 812 + Log2 = 813 + Last_Ieee = 813 + First_Directive = 814 + Define = 814 + Endif = 815 + Ifdef = 816 + Ifndef = 817 + Include = 818 + Timescale = 819 + Undef = 820 + Protect = 821 + Begin_Protected = 822 + End_Protected = 823 + Key_Block = 824 + Data_Block = 825 + Line = 826 + Celldefine = 827 + Endcelldefine = 828 + Default_Nettype = 829 + Resetall = 830 + Last_Directive = 830 + First_Systask = 831 + Bits = 831 + D_Root = 832 + D_Unit = 833 + Last_Systask = 833 + First_SV_Method = 834 + Size = 834 + Insert = 835 + Delete = 836 + Pop_Front = 837 + Pop_Back = 838 + Push_Front = 839 + Push_Back = 840 + Name = 841 + Len = 842 + Substr = 843 + Exists = 844 + Atoi = 845 + Itoa = 846 + Find = 847 + Find_Index = 848 + Find_First = 849 + Find_First_Index = 850 + Find_Last = 851 + Find_Last_Index = 852 + Num = 853 + Randomize = 854 + Pre_Randomize = 855 + Post_Randomize = 856 + Srandom = 857 + Get_Randstate = 858 + Set_Randstate = 859 + Seed = 860 + State = 861 + Last_SV_Method = 861 + First_BSV = 862 + uAction = 862 + uActionValue = 863 + BVI = 864 + uC = 865 + uCF = 866 + uE = 867 + uSB = 868 + uSBR = 869 + Action = 870 + Endaction = 871 + Actionvalue = 872 + Endactionvalue = 873 + Ancestor = 874 + Clocked_By = 875 + Default_Clock = 876 + Default_Reset = 877 + Dependencies = 878 + Deriving = 879 + Determines = 880 + Enable = 881 + Ifc_Inout = 882 + Input_Clock = 883 + Input_Reset = 884 + Instance = 885 + Endinstance = 886 + Let = 887 + Match = 888 + Method = 889 + Endmethod = 890 + Numeric = 891 + Output_Clock = 892 + Output_Reset = 893 + Par = 894 + Endpar = 895 + Path = 896 + Provisos = 897 + Ready = 898 + Reset_By = 899 + Rule = 900 + Endrule = 901 + Rules = 902 + Endrules = 903 + Same_Family = 904 + Schedule = 905 + Seq = 906 + Endseq = 907 + Typeclass = 908 + Endtypeclass = 909 + Valueof = 910 + uValueof = 911 + Last_BSV = 911 + First_Comment = 912 + Psl = 912 + Pragma = 913 + Last_Comment = 913 + First_PSL = 914 + A = 914 + Af = 915 + Ag = 916 + Ax = 917 + Abort = 918 + Assume_Guarantee = 919 + Before = 920 + Clock = 921 + E = 922 + Ef = 923 + Eg = 924 + Ex = 925 + Endpoint = 926 + Eventually = 927 + Fairness = 928 + Fell = 929 + Forall = 930 + G = 931 + Inf = 932 + Inherit = 933 + Never = 934 + Next_A = 935 + Next_E = 936 + Next_Event = 937 + Next_Event_A = 938 + Next_Event_E = 939 + Prev = 940 + Rose = 941 + Strong = 942 + W = 943 + Whilenot = 944 + Within = 945 + X = 946 + Last_PSL = 946 + First_Edif = 947 + Celltype = 957 + View = 958 + Viewtype = 959 + Direction = 960 + Contents = 961 + Net = 962 + Viewref = 963 + Cellref = 964 + Libraryref = 965 + Portinstance = 966 + Joined = 967 + Portref = 968 + Instanceref = 969 + Design = 970 + Designator = 971 + Owner = 972 + Member = 973 + Number = 974 + Rename = 975 + Userdata = 976 + Last_Edif = 976 diff --git a/python/libghdl/thin/vhdl/nodes.py b/python/libghdl/thin/vhdl/nodes.py index 335ebb240..8b5fd5306 100644 --- a/python/libghdl/thin/vhdl/nodes.py +++ b/python/libghdl/thin/vhdl/nodes.py @@ -1137,52 +1137,56 @@ class Iir_Predefined: Ieee_Numeric_Std_Shr_Uns_Nat = 258 Ieee_Numeric_Std_Shl_Sgn_Nat = 259 Ieee_Numeric_Std_Shr_Sgn_Nat = 260 - Ieee_Numeric_Std_Not_Uns = 261 - Ieee_Numeric_Std_Not_Sgn = 262 - Ieee_Numeric_Std_And_Uns_Uns = 263 - Ieee_Numeric_Std_And_Sgn_Sgn = 264 - Ieee_Numeric_Std_Or_Uns_Uns = 265 - Ieee_Numeric_Std_Or_Sgn_Sgn = 266 - Ieee_Numeric_Std_Nand_Uns_Uns = 267 - Ieee_Numeric_Std_Nand_Sgn_Sgn = 268 - Ieee_Numeric_Std_Nor_Uns_Uns = 269 - Ieee_Numeric_Std_Nor_Sgn_Sgn = 270 - Ieee_Numeric_Std_Xor_Uns_Uns = 271 - Ieee_Numeric_Std_Xor_Sgn_Sgn = 272 - Ieee_Numeric_Std_Xnor_Uns_Uns = 273 - Ieee_Numeric_Std_Xnor_Sgn_Sgn = 274 - Ieee_Numeric_Std_Neg_Uns = 275 - Ieee_Numeric_Std_Neg_Sgn = 276 - Ieee_Numeric_Std_Match_Log = 277 - Ieee_Numeric_Std_Match_Uns = 278 - Ieee_Numeric_Std_Match_Sgn = 279 - Ieee_Numeric_Std_Match_Slv = 280 - Ieee_Numeric_Std_Match_Suv = 281 - Ieee_Math_Real_Ceil = 282 - Ieee_Math_Real_Log2 = 283 - Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 284 - Ieee_Std_Logic_Unsigned_Add_Slv_Int = 285 - Ieee_Std_Logic_Unsigned_Add_Int_Slv = 286 - Ieee_Std_Logic_Unsigned_Add_Slv_Sl = 287 - Ieee_Std_Logic_Unsigned_Add_Sl_Slv = 288 - Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 289 - Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 290 - Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 291 - Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 292 - Ieee_Std_Logic_Unsigned_Le_Slv_Int = 293 - Ieee_Std_Logic_Unsigned_Le_Int_Slv = 294 - Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 295 - Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 296 - Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 297 - Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 298 - Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 299 - Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 300 - Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 301 - Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 302 - Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 303 - Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 304 - Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 305 - Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 306 + Ieee_Numeric_Std_Rol_Uns_Nat = 261 + Ieee_Numeric_Std_Ror_Uns_Nat = 262 + Ieee_Numeric_Std_Rol_Sgn_Nat = 263 + Ieee_Numeric_Std_Ror_Sgn_Nat = 264 + Ieee_Numeric_Std_Not_Uns = 265 + Ieee_Numeric_Std_Not_Sgn = 266 + Ieee_Numeric_Std_And_Uns_Uns = 267 + Ieee_Numeric_Std_And_Sgn_Sgn = 268 + Ieee_Numeric_Std_Or_Uns_Uns = 269 + Ieee_Numeric_Std_Or_Sgn_Sgn = 270 + Ieee_Numeric_Std_Nand_Uns_Uns = 271 + Ieee_Numeric_Std_Nand_Sgn_Sgn = 272 + Ieee_Numeric_Std_Nor_Uns_Uns = 273 + Ieee_Numeric_Std_Nor_Sgn_Sgn = 274 + Ieee_Numeric_Std_Xor_Uns_Uns = 275 + Ieee_Numeric_Std_Xor_Sgn_Sgn = 276 + Ieee_Numeric_Std_Xnor_Uns_Uns = 277 + Ieee_Numeric_Std_Xnor_Sgn_Sgn = 278 + Ieee_Numeric_Std_Neg_Uns = 279 + Ieee_Numeric_Std_Neg_Sgn = 280 + Ieee_Numeric_Std_Match_Log = 281 + Ieee_Numeric_Std_Match_Uns = 282 + Ieee_Numeric_Std_Match_Sgn = 283 + Ieee_Numeric_Std_Match_Slv = 284 + Ieee_Numeric_Std_Match_Suv = 285 + Ieee_Math_Real_Ceil = 286 + Ieee_Math_Real_Log2 = 287 + Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 288 + Ieee_Std_Logic_Unsigned_Add_Slv_Int = 289 + Ieee_Std_Logic_Unsigned_Add_Int_Slv = 290 + Ieee_Std_Logic_Unsigned_Add_Slv_Sl = 291 + Ieee_Std_Logic_Unsigned_Add_Sl_Slv = 292 + Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 293 + Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 294 + Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 295 + Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 296 + Ieee_Std_Logic_Unsigned_Le_Slv_Int = 297 + Ieee_Std_Logic_Unsigned_Le_Int_Slv = 298 + Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 299 + Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 300 + Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 301 + Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 302 + Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 303 + Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 304 + Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 305 + Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 306 + Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 307 + Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 308 + Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 309 + Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 310 Get_Kind = libghdl.vhdl__nodes__get_kind Get_Location = libghdl.vhdl__nodes__get_location diff --git a/src/std_names.adb b/src/std_names.adb index 7552a4097..9df07bb6d 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -644,6 +644,8 @@ package body Std_Names is Def ("std_match", Name_Std_Match); Def ("shift_left", Name_Shift_Left); Def ("shift_right", Name_Shift_Right); + Def ("rotate_left", Name_Rotate_Left); + Def ("rotate_right", Name_Rotate_Right); Def ("math_real", Name_Math_Real); Def ("ceil", Name_Ceil); Def ("log2", Name_Log2); diff --git a/src/std_names.ads b/src/std_names.ads index 3af9e6082..da13ace61 100644 --- a/src/std_names.ads +++ b/src/std_names.ads @@ -725,9 +725,11 @@ package Std_Names is Name_Std_Match : constant Name_Id := Name_First_Ieee + 023; Name_Shift_Left : constant Name_Id := Name_First_Ieee + 024; Name_Shift_Right : constant Name_Id := Name_First_Ieee + 025; - Name_Math_Real : constant Name_Id := Name_First_Ieee + 026; - Name_Ceil : constant Name_Id := Name_First_Ieee + 027; - Name_Log2 : constant Name_Id := Name_First_Ieee + 028; + Name_Rotate_Left : constant Name_Id := Name_First_Ieee + 026; + Name_Rotate_Right : constant Name_Id := Name_First_Ieee + 027; + Name_Math_Real : constant Name_Id := Name_First_Ieee + 028; + Name_Ceil : constant Name_Id := Name_First_Ieee + 029; + Name_Log2 : constant Name_Id := Name_First_Ieee + 030; Name_Last_Ieee : constant Name_Id := Name_Log2; -- Verilog Directives. diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb index e0876b2ad..c7b53a38b 100644 --- a/src/vhdl/vhdl-ieee-numeric.adb +++ b/src/vhdl/vhdl-ieee-numeric.adb @@ -296,6 +296,14 @@ package body Vhdl.Ieee.Numeric is (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Shr_Sgn_Nat, Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Shr_Uns_Nat); + Rol_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Rol_Sgn_Nat, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Rol_Uns_Nat); + + Ror_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Ror_Sgn_Nat, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Ror_Uns_Nat); + Error : exception; procedure Extract_Declarations (Pkg_Decl : Iir_Package_Declaration; @@ -622,6 +630,10 @@ package body Vhdl.Ieee.Numeric is Handle_Shift (Shl_Patterns); when Name_Shift_Right => Handle_Shift (Shr_Patterns); + when Name_Rotate_Left => + Handle_Shift (Rol_Patterns); + when Name_Rotate_Right => + Handle_Shift (Ror_Patterns); when others => null; end case; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 53c3ba053..27ec94448 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5005,6 +5005,11 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_Shl_Sgn_Nat, Iir_Predefined_Ieee_Numeric_Std_Shr_Sgn_Nat, + Iir_Predefined_Ieee_Numeric_Std_Rol_Uns_Nat, + Iir_Predefined_Ieee_Numeric_Std_Ror_Uns_Nat, + Iir_Predefined_Ieee_Numeric_Std_Rol_Sgn_Nat, + Iir_Predefined_Ieee_Numeric_Std_Ror_Sgn_Nat, + Iir_Predefined_Ieee_Numeric_Std_Not_Uns, Iir_Predefined_Ieee_Numeric_Std_Not_Sgn, |