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-rw-r--r--src/synth/synth-vhdl_eval.adb30
1 files changed, 30 insertions, 0 deletions
diff --git a/src/synth/synth-vhdl_eval.adb b/src/synth/synth-vhdl_eval.adb
index 9dd6465ca..05d2a2556 100644
--- a/src/synth/synth-vhdl_eval.adb
+++ b/src/synth/synth-vhdl_eval.adb
@@ -481,6 +481,20 @@ package body Synth.Vhdl_Eval is
Res := Compare_Uns_Uns (Left, Right, Greater, Expr) = Equal;
return Create_Memory_U8 (Boolean'Pos (Res), Res_Typ);
end;
+ when Iir_Predefined_Ieee_Numeric_Std_Ne_Uns_Uns =>
+ declare
+ Res : Boolean;
+ begin
+ Res := Compare_Uns_Uns (Left, Right, Greater, Expr) /= Equal;
+ return Create_Memory_U8 (Boolean'Pos (Res), Res_Typ);
+ end;
+ when Iir_Predefined_Ieee_Numeric_Std_Ne_Uns_Nat =>
+ declare
+ Res : Boolean;
+ begin
+ Res := Compare_Uns_Nat (Left, Right, Greater, Expr) /= Equal;
+ return Create_Memory_U8 (Boolean'Pos (Res), Res_Typ);
+ end;
when Iir_Predefined_Ieee_Numeric_Std_Eq_Sgn_Sgn =>
declare
Res : Boolean;
@@ -546,6 +560,13 @@ package body Synth.Vhdl_Eval is
Res := Compare_Sgn_Sgn (Left, Right, Less, Expr) >= Equal;
return Create_Memory_U8 (Boolean'Pos (Res), Res_Typ);
end;
+ when Iir_Predefined_Ieee_Numeric_Std_Ge_Uns_Nat =>
+ declare
+ Res : Boolean;
+ begin
+ Res := Compare_Uns_Nat (Left, Right, Less, Expr) >= Equal;
+ return Create_Memory_U8 (Boolean'Pos (Res), Res_Typ);
+ end;
when Iir_Predefined_Ieee_Numeric_Std_Le_Uns_Uns =>
declare
@@ -1018,6 +1039,15 @@ package body Synth.Vhdl_Eval is
return Res;
end;
+ when Iir_Predefined_Ieee_1164_Scalar_Is_X =>
+ declare
+ B : Std_Ulogic;
+ begin
+ B := Read_Std_Logic (Param1.Val.Mem, 0);
+ B := To_X01 (B);
+ return Create_Memory_U8 (Boolean'Pos (B = 'X'), Res_Typ);
+ end;
+
when Iir_Predefined_Ieee_Math_Real_Log2 =>
declare
function Log2 (Arg : Fp64) return Fp64;